ES25P80 Datasheet, PDF (11/35 Pages) Excel Semiconductor Inc. – 8Mbit CMOS 3.0 Volt Flash Memory with 75Mhz SPI Bus Interface

ADVANCED INFORMATION
EE SS II
Excel Semiconductor inc.
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4) sets
the Write Enable Latch (WEL) bit. The Write Enable
Latch (WEL) bit must be set prior to every Page Pro-
gram (PP or PPP), Erase (SE, BE or PE) and Write
Status Register (WRSR) instruction. The Write
Enable (WREN) instruction is entered by driving
Chip Select (CS#) Low, sending the instruction code,
and then driving Chip Select (CS#) High.
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 5)
resets the Write Enable Latch (WEL) bit. The Write
Disable (WRDI) instruction is entered by driving Chip
Select (CS#) Low, sending the instruction code, and
then driving Chip Select (CS#) High.
The Write Enable (WEL) bit is reset under the follow-
ing conditions :
- Power-up
- WRDI instruction completion
- WRSR instruction completion
- PP instruction completion
- SE instruction completion
- BE instruction completion
CS#
SCK
SI
SO
0
1
2
3
4
5
6
7
0
0
Instruction
0
0
0
1
1
0
High Impedance
Figure 4. Write Enable ( WREN ) Instruction Sequence
CS#
SCK
SI
SO
0
1
2
3
4
5
6
7
0
0
Instruction
0
0
0
1
0
0
High Impedance
Figure 5. Write Disable ( WRDI ) Instruction Sequence
ES25P80
11
Rev. 0D May, 11, 2006