XRT71D00_01 Datasheet, PDF (7/26 Pages) Exar Corporation – E3/DS3/STS-1 JITTER ATTENUATOR

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XRT71D00
E3/DS3/STS-1 JITTER ATTENUATOR
REV. 1.2.0
PIN DESCRIPTION
PIN #
12
NAME
HOST/HW
TYPE
DESCRIPTION
I Host/Hardware Mode Select:
This input pin permits the user to configure the XRT71D00 device to operate in either
the “Host” or “Hardware” Mode.
Setting this input pin “high” configures the XRT71D00 device to operate in the “Host”
Mode (e.g., enables the Microprocessor Serial Interface). In this mode, the user is
expected to configure the XRT71D00 device by writing data into the “on-chip” Com-
mand Registers via the Microprocessor Serial Interface. As a consequence, when the
XRT71D00 device is operating in the “Host” Mode, then it will ignore the states of many
of the discrete input pins.
Setting this input pin “low” configures the XRT71D00 device to operate in the “Hard-
ware” Mode. When the XRT71D00 device is operating in the “Hardware” Mode, then
the Microprocessor Serial Interface will be disabled. In this mode, many of the external
input control pins will be functional.
13
NC
*** This pin is not connected internally.
14
FL
O FIFO Limit Alarm Output Indicator.
This output pin is driven high whenever the internal FIFO comes within two-bits of
being completely full or completely depleted.
When this output pin is asserted, it will be driven “high” for at least one “RRCLK” cycle
period.
15
BWS/
I Bandwidth Select Input/Channel Addr_1 Assignment Input. The function of
Ch_Addr_1
this input pin depends on whether XRT71D00 is configured in Host or Hardware mode.
Hardware Mode—Bandwidth Select Input:
This input pin permits the user to configure the PLL (within the XRT71D00 device) to
operate with either a wide or narrow bandwidth. Setting this input pin “high” configures
the PLL to operate with a wide bandwidth
Conversely, setting this input pin “low” configures the PLL to operate with a “narrow-
bandwidth”.
Host Mode—Channel_Addr_1 Assignment Input:
This input pin, along with pin 28 permits the user to assign a “Channel Address” to the
XRT71D00 device.
NOTE: A detailed discussion on “Channel Assignment” is presented in Section _.
16
NC
*** This pin is not connected internally.
17
NC
*** This pin is not connected internally.
6