XR21B1420IL28-0A Datasheet, PDF (57/60 Pages) Exar Corporation – Enhanced 1-Ch Full-Speed USB UART

XR21B1420
Bit
3
2
1:0
Default
Description
0
GPIO0/RI#
0: Corresponding GPIO is push-pull output during suspend if USE_SUSPEND = ’1’
1: Corresponding GPIO is open-drain output during suspend if USE_SUSPEND = ’1’
0
GPIO1/CD#
0: Corresponding GPIO is push-pull outupt during suspend if USE_SUSPEND = ’1’
1: Corresponding bit set to logic ’1’ during suspend if USE_SUSPEND = ’1’
0
Not used
PIN_CFG_RS485_POL (0x033) - Read/Write OTP
This register configures the polarity of the selected auto RS-485 half-duplex control pin.
Bit
7:1
0
Default
Description
0
Reserved
These bits are reserved and should be written as ’0’.
0
POL
0: Active low auto. RS-485 half-duplex enable
1: Active high auto. RS-485 half-duplex enable
CLK_DIV (0x034) - Read/Write OTP
This register sets the default clock divisor for the CLK output.
Bit
7:0
Default
Description
0
VALUE
Output clock frequency will be determined by the formula:
FREQ = 24 MHz / 2 * (VALUE). If VALUE = 0, FREQ = 24 MHz
© 2014 Exar Corporation
57 / 60
exar.com/XR21B1420
Rev 1A