XR16C854D Datasheet, PDF (53/54 Pages) Exar Corporation – 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO

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XR16C854/XR16C854D
3.3V AND 5V QUAD UART WITH 128-BYTE FIFO
REV. 2.0
TABLE OF CONTENTS
GENERAL DESCRIPTION................................................................................................. 1
FEATURES .................................................................................................................................................. 1
APPLICATIONS............................................................................................................................................. 1
FIGURE 1. XR16C854 BLOCK DIAGRAM .................................................................................................................................................. 1
FIGURE 2. PIN OUT ASSIGNMENT FOR 100-PIN QFP PACKAGES IN 16 AND 68 MODE ............................................................................... 2
FIGURE 3. PIN OUT ASSIGNMENT FOR PLCC PACKAGES IN 16 AND 68 MODE AND TQFP PACKAGES....................................................... 3
ORDERING INFORMATION ............................................................................................................................. 3
PIN DESCRIPTIONS ......................................................................................................... 4
1.0 Product DESCRIPTION ........................................................................................................... 9
2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................. 10
2.1 CPU INTERFACE ............................................................................................................................... 10
FIGURE 4. XR16C854/854D TYPICAL INTEL/MOTOROLA DATA BUS INTERCONNECTIONS ........................................................................ 10
2.2 5-VOLT TOLERANT INPUTS ................................................................................................................ 11
2.3 DEVICE RESET .................................................................................................................................. 11
2.4 DEVICE IDENTIFICATION AND REVISION .............................................................................................. 11
2.5 CHANNEL SELECTION ........................................................................................................................ 11
TABLE 1: CHANNEL A-D SELECT IN 16 MODE ........................................................................................................................................ 11
TABLE 2: CHANNEL A-D SELECT IN 68 MODE ........................................................................................................................................ 11
2.6 CHANNELS A-D INTERNAL REGISTERS ............................................................................................... 12
2.7 INT OUPUTS FOR CHANNELS A-D ..................................................................................................... 12
2.8 DMA MODE ...................................................................................................................................... 12
TABLE 3: INT PINS OPERATION FOR TRANSMITTER FOR CHANNELS A-D................................................................................................. 12
TABLE 4: INT PIN OPERATION FOR RECEIVER FOR CHANNELS A-D ........................................................................................................ 12
2.9 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT ........................................................................... 13
FIGURE 5. TYPICAL OSCILATOR CONNECTIONSL ...................................................................................................................................... 13
2.10 PROGRAMMABLE BAUD RATE GENERATOR ....................................................................................... 13
TABLE 5: TXRDY# AND RXRDY# OUTPUTS IN FIFO AND DMA MODE FOR CHANNELS A-D................................................................... 13
2.11 TRANSMITTER ................................................................................................................................. 14
2.11.1 Transmit Holding Register (THR) - Write Only ....................................................................................... 14
2.11.2 Transmitter Operation in non-FIFO Mode .............................................................................................. 14
FIGURE 6. BAUD RATE GENERATOR AND PRESCALER ............................................................................................................................ 14
TABLE 6: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK.............................................................................. 14
2.11.3 Transmitter Operation in FIFO Mode ..................................................................................................... 15
2.12 RECEIVER ....................................................................................................................................... 15
FIGURE 7. TRANSMITTER OPERATION IN NON-FIFO MODE...................................................................................................................... 15
FIGURE 8. TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE............................................................................................. 15
2.12.1 Receive Holding Register (RHR) - Read-Only ....................................................................................... 16
FIGURE 9. RECEIVER OPERATION IN NON-FIFO MODE ........................................................................................................................... 16
FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE............................................................................... 16
2.13 AUTO RTS HARDWARE FLOW CONTROL .......................................................................................... 17
2.14 AUTO RTS HYSTERESIS ................................................................................................................. 17
2.15 AUTO CTS FLOW CONTROL ........................................................................................................... 17
FIGURE 11. AUTO RTS AND CTS FLOW CONTROL OPERATION .............................................................................................................. 18
2.16 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ............................................................................... 19
2.17 SPECIAL CHARACTER DETECT ........................................................................................................ 19
2.18 INFRARED MODE ............................................................................................................................. 19
TABLE 7: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL....................................................................................................................... 19
2.19 SLEEP MODE WITH AUTO WAKE-UP ............................................................................................... 20
FIGURE 12. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING ................................................................................. 20
2.20 INTERNAL LOOPBACK ..................................................................................................................... 21
FIGURE 13. INTERNAL LOOP BACK IN CHANNELS A-D............................................................................................................................. 22
3.0 UART INTERNAL REGISTERS ............................................................................................. 23
TABLE 8: UART CHANNEL A AND B UART INTERNAL REGISTERS ............................................................................................. 23
TABLE 9: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1 ................................................ 24
4.0 INTERNAL Register descriptions ........................................................................................ 26
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ........................................................................... 26
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