XR16M890_11 Datasheet, PDF (52/63 Pages) Exar Corporation – UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS

XR16M890
UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
REV. 1.0.0
AC ELECTRICAL CHARACTERISTICS
TA = -40^O TO +85^OC, VCC IS 1.62 TO 3.63V, 70 PF LOAD WHERE APPLICABLE
SYMBOL
XTAL1
ECLK
T_ECLK
T_AS
T_AH
T_CS
T_RD
T_DY
T_RDV
T_DD
T_WR
T_DY
T_DS
T_DH
T_ADS
T_ADH
T_RWS
PARAMETER
UART Crystal Frequency
External Clock Frequency
External Clock Time Period
LIMITS
1.8V ± 10%
MIN
MAX
LIMITS
2.5V ± 10%
MIN
MAX
LIMITS
3.3V ± 10%
MIN
MAX
UNIT
24
24
24 MHz
36
64
100 MHz
13
7
5
ns
16 Mode (Intel) Data Bus Read/Write Timing
Address Setup Time
0
0
0
ns
Address Hold Time
0
0
0
ns
Chip Select Width
50
45
40
ns
IOR# Strobe Width
50
45
40
ns
Read Cycle Delay
50
45
40
ns
Data Access Time
45
40
35
ns
Data Disable Time
25
20
15
ns
IOW# Strobe Width
50
45
40
ns
Write Cycle Delay
50
45
40
ns
Data Setup Time
30
25
20
ns
Data Hold Time
0
0
0
ns
68 Mode (Motorola) Data Bus Read/Write Timing
Address Setup
0
0
0
ns
Address Hold
0
0
0
ns
R/W# Setup to CS#
0
0
0
ns
T_RDA Data Access Time
45
40
35
ns
T_RDH Data Disable Time
T_WDS Write Data Setup
25
15
10
ns
20
15
10
ns
T_WDH Write Data Hold
3
3
3
ns
T_RWH CS# De-asserted to R/W# De-asserted
0
T_CSL CS# Strobe Width
50
0
0
ns
45
40
ns
T_CSD CS# Cycle Delay
50
45
40
ns
52