XR16L570 Datasheet, PDF (5/46 Pages) Exar Corporation – SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE

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REV. 1.0.0
XR16L570
SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
1.0 PRODUCT DESCRIPTION
The XR16L570 (L570) is an enhanced 16C550 Universal Asynchronous Receiver and Transmitter (UART). Its
features set is compatible to the ST16C580 device and additionally offers Power-Save to isolate the data bus
interface during Sleep mode. The XR16L570 can operate from 1.62V to 5.5V with 5 volt tolerant inputs. The
configuration registers set is 16550 UART compatible for control, status and data transfer. Also, the L570 has
16-bytes of transmit and receive FIFOs, automatic RTS/CTS hardware flow control, automatic Xon/Xoff and
special character software flow control, transmit and receive FIFO trigger levels, infrared encoder and decoder
(IrDA ver 1.0), programmable baud rate generator with a prescaler of divide by 1 or 4. The L570 is fabricated
using an advanced CMOS process.
Enhanced Features
The L570 UART provides a solution that supports 16 bytes of transmit and receive FIFO memory. The L570 is
designed to work with low supply voltage and high performance data communication systems, that require fast
data processing time. Increased performance is realized in the L570 by the transmit and receive FIFOs, FIFO
trigger level controls and automatic flow control mechanism. This allows the external processor to handle more
networking tasks within a given time. This increases the service interval giving the external CPU additional time
for other applications and reducing the overall UART interrupt servicing time. In addition, the L570 provides the
Power-Save mode that drastically reduces the power consumption when the device is not used. The
combination of the above greatly reduces the CPU’s bandwidth requirement, increases performance, and
reduces power consumption.
Data Bus Interface
The L570 provides a host interface that supports a microprocessor (CPU) data bus interface. The interface
allows direct interconnect to Intel compatible type of CPUs using IOR#, IOW# and CS# inputs for data bus
operation. See pin description section for details on all the control signals.
Data Rate
The L570 is capable of operation up to 4 Mbps at 5V, 3 Mbps at 3.3V, 1 Mbps at 2.5V and 750 Kbps at 1.8V
with 16X internal sampling clock rate by using an external clock source on the XTAL1 (CLK) pin.
Internal Enhanced Register Sets
The L570 UART has a set of enhanced registers providing control and monitoring functions. Interrupt enable/
disable and status, FIFO enable/disable, selectable TX and RX FIFO trigger levels, automatic hardware/
software flow control enable/disable, programmable baud rates, infrared encoder/decoder enable/disable,
modem interface controls and status, sleep mode and Power-Save mode (in the 24-QFN package) are all
standard features. Following a power on reset or an external reset, the registers defaults to the reset condition
and it is compatible with previous generation of UARTs, 16C450, 16C550, 16C580, 16L580, 16C650A and
16C850.
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