XR16C2550 Datasheet, PDF (38/38 Pages) Exar Corporation – 2.97V TO 5.5V DUART WITH 16-BYTE FIFO

XR16C2550
REV. 1.0.0
xr
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
TABLE 11: UART RESET CONDITIONS FOR CHANNEL A AND B............................................................................................ 24
ABSOLUTE MAXIMUM RATINGS...................................................................................25
PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) ................25
ELECTRICAL CHARACTERISTICS ................................................................................25
DC ELECTRICAL CHARACTERISTICS ..............................................................................................................25
AC ELECTRICAL CHARACTERISTICS ..............................................................................................................26
TA=-40o to +85oC, Vcc = 2.97V to 5.5V, 70 pF load where applicable .................................................................... 26
FIGURE 12. AC TIMING VALUES ..................................................................................................................................................... 27
FIGURE 13. CLOCK TIMING............................................................................................................................................................. 27
FIGURE 14. MODEM INPUT/OUTPUT TIMING FOR CHANNELS A & B ................................................................................................. 28
FIGURE 15. DATA BUS READ TIMING .............................................................................................................................................. 28
FIGURE 16. DATA BUS WRITE TIMING............................................................................................................................................. 29
FIGURE 17. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B ......................................................... 29
FIGURE 18. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B ....................................................... 30
FIGURE 19. RECEIVE READY & INTERRUPT TIMING [FIFO MODE, DMA DISABLED] FOR CHANNELS A & B........................................ 30
FIGURE 20. RECEIVE READY & INTERRUPT TIMING [FIFO MODE, DMA ENABLED] FOR CHANNELS A & B......................................... 31
FIGURE 21. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE DISABLED] FOR CHANNELS A & B............................ 31
FIGURE 22. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE ENABLED] FOR CHANNELS A & B ............................ 32
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1 mm) ................................................33
PACKAGE DIMENSIONS (44 PIN PLCC) .......................................................................34
PACKAGE DIMENSIONS (40 PIN PDIP).........................................................................35
REVISION HISTORY............................................................................................................................. 36
5.0 TABLE OF CONTENTS ..........................................................................................................................I
II