XR16L2552IM-F Datasheet, PDF (35/45 Pages) Exar Corporation – 2.25V TO 5.5V DUART WITH 16-BYTE FIFO

REV. 1.1.2
XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
TABLE 13: UART RESET CONDITIONS FOR CHANNELS A AND B
REGISTERS
RESET STATE
DLL
Bits 7-0 = 0xXX
DLM
Bits 7-0 = 0xXX
AFR
Bits 7-0 = 0x00
RHR
Bits 7-0 = 0xXX
THR
Bits 7-0 = 0xXX
IER
Bits 7-0 = 0x00
FCR
Bits 7-0 = 0x00
ISR
Bits 7-0 = 0x01
LCR
Bits 7-0 = 0x00
MCR
Bits 7-0 = 0x00
LSR
Bits 7-0 = 0x60
MSR
Bits 3-0 = Logic 0
Bits 7-4 = Logic levels of the inputs inverted
SPR
Bits 7-0 = 0xFF
EFR
Bits 7-0 = 0x00
XON1
Bits 7-0 = 0x00
XON2
Bits 7-0 = 0x00
XOFF1
Bits 7-0 = 0x00
XOFF2
Bits 7-0 = 0x00
I/O SIGNALS
RESET STATE
TX
Logic 1
MF#
Logic 1
RTS#
Logic 1
DTR#
Logic 1
TXRDY#
Logic 0
INT
Logic 0
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%)
Thermal Resistance (48-TQFP)
theta-ja =59^oC/W, theta-jc = 16^oC/W
Thermal Resistance (44-PLCC)
theta-ja = 50^oC/W, theta-jc = 21^oC/W
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