XR16L2552IM-F Datasheet, PDF (14/45 Pages) Exar Corporation – 2.25V TO 5.5V DUART WITH 16-BYTE FIFO

XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
.
FIGURE 9. RECEIVER OPERATION IN NON-FIFO MODE
16X Clock
Receive Data Shift
Register (RSR)
Data Bit
Validation
Receive Data Characters
REV. 1.1.2
Receive
Data Byte
and Errors
Error
Tags in
LSR bits
4:2
Receive Data
Holding Register
(RHR)
RHR Interrupt (ISR bit-2)
RXFIFO1
FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE
16X Clock
16 bytes by 11-bit
wide
FIFO
Receive Data
Byte and Errors
Receive Data Shift
Register (RSR)
Receive
Data FIFO
Receive
Data
Data Bit
Validation
Receive Data Characters
Example
:
- RX FIFO trigger level selected at 8 bytes
Data falls to 4 ^{RTS# re-asserts when data falls below the flow}
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
FIFO Trigger=8
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
Data fills to 14 ^{RTS# de-asserts when data fills above the flow}
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RXFIFO1
14