XR16L2552IM-F Datasheet, PDF (22/45 Pages) Exar Corporation – 2.25V TO 5.5V DUART WITH 16-BYTE FIFO

XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
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REV. 1.1.2
TABLE 8: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1
ADDRESS REG READ/
A2-A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4 BIT-3 BIT-2 BIT-1 BIT-0
COMMENT
16C550 Compatible Registers
0 0 0 RHR RD Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0 0 0 THR WR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
001
010
IER RD/WR 0/
0/
0/
0/ Modem RX Line TX
RX
CTS Int. RTS Int.
Enable Enable
Xoff Int.
Enable
Sleep
Mode
Enable
Stat. Stat. Empty Data
Int.
Int.
Int
Int.
Enable Enable Enable Enable
ISR RD FIFOs FIFOs
0/
LCR[7] = 0
0/
INT INT INT INT
Enabled Enabled
Source Source Source Source
INT
INT _{Bit-3 Bit-2 Bit-1 Bit-0}
Source Source
Bit-5 Bit-4
0 1 0 FCR WR RXFIFO RXFIFO 0
Trigger Trigger
0
DMA TX
RX FIFOs
Mode FIFO FIFO Enable
Enable Reset Reset
011
LCR RD/WR Divisor Set TX Set Par- Even Parity Stop Word Word
Enable Break
ity
Parity Enable Bits Length Length
Bit-1 Bit-0
100
MCR RD/WR
0/
BRG
Pres-
caler
0/
IR Mode
ENable
0/
XonAny
Internal OP2# Rsvd RTS# DTR#
Lopback Output _(OP1#) Output Output
Enable Control
Control Control
1 0 1 LSR RD RX FIFO THR & THR
RX
RX
RX
RX
RX
Global TSR Empty Break Fram- Parity Over- Data LCR ≠ 0xBF
Error Empty
ing Error run Ready
Error
Error
1 1 0 MSR RD
CD#
Input
RI#
Input
DSR#
Input
CTS# Delta Delta Delta Delta
Input CD# RI# DSR# CTS#
1 1 1 SPR RD/WR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Baud Rate Generator Divisor
000
001
010
DLL RD/WR Bit-7
DLM RD/WR Bit-7
AFR RD/WR Rsvd
0 0 0 DREV RD
0 0 1 DVID RD
Bit-7
0
Bit-6
Bit-6
Rsvd
Bit-6
0
Bit-5
Bit-5
Rsvd
Bit-5
0
Bit-4
Bit-4
Rsvd
Bit-4
0
Bit-3
Bit-3
Rsvd
Bit-2 Bit-1 Bit-0
Bit-2 Bit-1 Bit-0
RXRDY# Baudout# Concur-
Select Select rent Write
LCR[7] = 1
LCR ≠ 0xBF
Bit-3
0
Bit-2
0
Bit-1
1
Bit-0
0
LCR[7]=1
LCR ≠ 0xBF
DLL=0x00
DLM=0x00
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