XR20M1280 Datasheet, PDF (32/63 Pages) Exar Corporation – I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS

XR20M1280
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
REV. 1.0.0
3.4.1 Interrupt Generation:
• LSR is by any of the LSR bits 1, 2, 3 and 4.
• RXRDY is by RX trigger level.
• RXRDY Time-out is by a 4-char plus 12 bits delay timer.
• TXRDY is by TX trigger level or TX FIFO empty.
• MSR is by any of the MSR bits 0, 1, 2 and 3.
• Receive Xon/Xoff/Special character is by detection of a Xon, Xoff or Special character.
• CTS# is when the remote transmitter toggles the input pin (from LOW to HIGH) during auto CTS flow control.
• RTS# is when its receiver toggles the output pin (from LOW to HIGH) during auto RTS flow control.
• Wakeup interrupt is generated when the M1280 wakes up from the sleep mode.
• GPIO interrupt is generated when a GPIO input has been asserted (polarity selected by GPIOINV register)
3.4.2 Interrupt Clearing:
• LSR interrupt is cleared by a read to the LSR register.
• RXRDY interrupt is cleared by reading data until FIFO falls below the trigger level.
• RXRDY Time-out interrupt is cleared by reading RHR.
• TXRDY interrupt is cleared by a read to the ISR register or writing to THR.
• MSR interrupt is cleared by a read to the MSR register.
• Xon or Xoff interrupt is cleared by a read to the ISR register.
• Special character interrupt is cleared by a read to ISR register or after next character is received.
• RTS# and CTS# flow control interrupts are cleared by a read to the MSR register.
• Wakeup interrupt is cleared by a read to ISR register.
• GPIO interrupt is cleared by a read to the GPIOLVL register
]
TABLE 11: INTERRUPT SOURCE AND PRIORITY LEVEL
PRIORITY
ISR REGISTER STATUS BITS
SOURCE OF INTERRUPT
LEVEL BIT-5 BIT-4 BIT-3 BIT-2 BIT-1
BIT-0
1
0
0
0
1
1
0 LSR (Receiver Line Status Register)
2
0
0
1
1
0
0 RXRDY (Receive Data Time-out)
3
0
0
0
1
0
0 RXRDY (Received Data Ready)
4
0
0
0
0
1
0 TXRDY (Transmit Ready)
5
0
0
0
0
0
0 MSR (Modem Status Register)
6
0
1
0
0
0
0 RXRDY (Received Xon, Xoff or Special character)
7
1
0
0
0
0
0 CTS#, RTS# change of state
-
0
0
0
0
0
1 None (default) or Wakeup interrupt
32