English
Language : 

XRT84L38 Datasheet, PDF (317/451 Pages) Exar Corporation – OCTAL T1/E1/J1 FRAMER
áç
XRT84L38
OCTAL T1/E1/J1 FRAMER
REV. 1.0.0
The Receive Back-plane Interface is pumping out data through RxSer_0 or RxSer_4 pins at 16.384Mbit/s. The
Receive High-speed Back-plane Interface multiplexes payload and signaling data of every four channels into
one data stream. Payload and signaling data of Channel 0-3 are multiplexed onto the Receive Serial Data pin
of Channel 0. Payload and signaling data of Channel 4-7 are multiplexed onto the Receive Serial Data pin of
Channel 4.
Free-running clocks of 16.384MHz are supplied to the Receive Serial Clock pin of Channel 0 and Channel 4 of
the framer. The Receive High-speed Back-plane Interface of the farmer provides data at rising edge of this Re-
ceive Serial Clock. The local Terminal Equipment then latches incoming serial data at falling edge of the clock.
The Receive High-speed Back-plane Interface maps four 2.048Mbit/s E1 data streams into this 16.384Mbit/s
data stream as described below:
1. Payload data of four channels are repeated and grouped together in a byte-interleaved way. The first pay-
load bit of Timeslot 0 of Channel 0 is sent first, followed by the second payload bit of Timeslot 0 of Channel
0 and so on. After all the bits of Timeslot 0 of Channel 0 is sent repeatedly, the Receive High-speed Back-
plane Interface will start sending the payload bits of Timeslot 0 of Channel 1 and 2. The payload bits of
Timeslot 0 of Channel 3 are sent the last.
After the payload bits of Timeslot 0 of all four channels are sent, it comes the payload bits of Timeslot 1 of
Channel 0 and so on. The table below demonstrates how payload bits of four channels are mapped into
the 16.384Mbit/s data stream.
FIRST OCTET OF 16.384MBIT/S DATA STREAM
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
10
10
20
20
30
30
40
40
THIRD OCTET OF 16.384MBIT/S DATA STREAM
BIT 0
BIT 1
BIT 2
BIT 3
11
11
21
21
BIT 4
31
BIT 5
31
BIT 6
41
BIT 7
41
FIFTH OCTET OF 16.384MBIT/S DATA STREAM
BIT 0
BIT 1
BIT 2
BIT 3
12
12
22
22
BIT 4
32
BIT 5
32
BIT 6
42
BIT 7
42
SEVENTH OCTET OF 16.384MBIT/S DATA STREAM
BIT 0
BIT 1
BIT 2
BIT 3
13
13
23
23
BIT 4
33
BIT 5
33
BIT 6
43
BIT 7
43
XY: The Xth payload bit of Channel Y
2. The Receive High-speed Back-plane Interface also multiplexed signaling bits with payload bits and sent
them together through the 16.384Mbit/s data stream.
314