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XRD9825 Datasheet, PDF (25/33 Pages) Exar Corporation – 16-Bit Linear CIS/CCD Sensor Signal Processor with Serial Control
XRD9825
From CCD RED
Channel
C EXT R
VRT
S1 S2 S3
S1, S2 and S3 close when
CLAMP is high and open
when CLAMP is low
From CCD
GRN Channel
C EXTG
From CCD BLU
Channel
C EXT B
XRD9827
S4
T/H
S5
T/H
S6
12-Bit ADC
S7
VRT - VPIX
-
PGA
+
S9 closes at rising edge and opens
at falling edge of ADCCLK
S9
T/H
S8
VRT VCDS = PGAG * [VRT - (VRT - VPIX)]
= PGAG * VPIX
CCD
Waveform
CLAMP
ADCCLK
S8 Opens, S4,
S5 and S6
close at this
rising edge
Track
RED
S6 opens, S7
closes at this
rising edge
Convert
RED
Track
GRN
VBLK
VPIX
VBLK - VPIX
S7 opens, S8
closes at this
rising edge
Convert
GRN
Track
BLU
S8 Opens, S4,
S5 and S6
close at this
rising edge
Convert
BLU
Track
RED
S4 and S5 open
at this falling
edge
Convert
RED
Figure 19. CDS Timing (Triple Channel)
Mode: 110 00001110
Rev. 1.00
25