XR16V698 Datasheet, PDF (22/58 Pages) Exar Corporation – 2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO

XR16V698
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
REV. 1.0.3
3.0 XR16V698 REGISTERS
The XR16V698 octal UART register set consists of the Device Configuration Registers that are accessible
directly from the data bus for programming general operating conditions of the UARTs and monitoring the
status of various functions. These functions include all 8 channel UART’s interrupt control and status, 16-bit
general purpose timer control and status, sleep mode, soft-reset, and device identification and revision. Also,
each UART channel has its own set of internal UART Configuration Registers for its own operation control,
status reporting and data transfer. These registers are mapped into a 256-byte of the data memory address
space. The following paragraphs describe all the registers in detail.
FIGURE 12. THE XR16V698 REGISTERS
8-bit Data
Bus
Interface
Channel 0
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
INT0, INT1, INT2,
INT3, TIMER,
SLEEP, RESET
0x00-0F
0x10-1F
0x20-2F
0x30-3F
0x40-4F
0x50-5F
0x60-6F
0x70-7F
0x80-8F
UART[7:0] Configuration
Registers
16550 Compatible and EXAR
Enhanced Registers
Device Configuration Registers
8 channel Interrupts,
16-bit Timer/Counter,
Sleep, Reset, DVID, DREV
698REGS-1
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