English
Language : 

XR17D158IV-F Datasheet, PDF (20/73 Pages) Exar Corporation – UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
xr
REV. 1.2.2
2.2.2
General Purpose 16-bit Timer/Counter [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (DEFAULT
0XXX-XX-00-00)
A 16-bit down-count timer for general purpose timer or counter. Its clock source may be selected from internal
crystal oscillator or externally on pin TMRCK. The timer can be set to be a single-shot for a one-time event or
re-triggerable for continue interval. An interrupt may be generated in the INT Register when the timer times out.
It is controlled through 4 configuration registers [TIMERCNTL, TIMER, TIMELSB, TIMERMSB]. These
registers provide start/stop and re-triggerable or one-shot operation. The time-out output of the Timer can be
set to generate an interrupt for system or event alarm.
FIGURE 7. TIMER/COUNTER CIRCUIT.
TIMERMSB and TIMERLSB
(16-bit Value)
TMRCK
1
OSC. CLOCK
0
16-Bit
Time-out
1
Timer/Counter
0
Clock
TIMERCNTL [3] Select
Start/Stop
TIMERCNTL [1]
TIMERCNTL [2] Single/Re-triggerable
Re-trigger
0
1
Single-shot
TIMERCNTL [0] Timer Interrupt Enable
TIMERCNTL [4]
Timer Interrupt, Ch-0 INT=7
No Interrupt
1
MPIO[0]
0
MPIOLVL[0]
TABLE 8: TIMER CONTROL REGISTERS
TIMERCNTL [0] Logic zero (default) disables Timer-Counter interrupt and logic one enables the interrupt, reading the
TIMERCNTL clears the interrupt.
TIMERCNLT [1] Logic zero (default) stops/pauses the timer and logic one starts/re-starts the timer/counter.
TIMERCNTL [2] Logic zero (default) selects re-trigger timer function and logic one selects one-shot (timer function.
TIMERCNTL [3] Logic zero (default) selects internal and logic one selects external clock to the timer/counter.
TIMERCNTL [4] Routes the Timer-Counter interrupt to MPIO[0] if MPIOSEL[0]=0 for external event control.
TIMERCNTL [7:5] Reserved (defaults to zero)
TIMERCNTL Register
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Rsvd
Rsvd
Rsvd
MPIO[0]
Control
Clock
Select
Single/
Re-trigger
Start/
Stop
INT
Enable
TIMER [15:8] Reserved
20