XRD98L59 Datasheet, PDF (17/37 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 10-Bit A/D

XRD98L59
SBLK and SPIX Programmable Aperture Delay
(SDI Address = 0010)
The positioning of φ1 and φ2 from Figure 10, are opti-
mized by using a programmable aperture delay function.
φ1 and φ2 are delayed internally by the amount specified
in the serial port. SBLK delay (D7:D5) delays the φ1
clock and SPIX delay (D4:D2) delays the φ2 clock. The
delay is 2ns per lsb. The aperture delays t_BK and t_VD are
added to the programmable aperture delay to determine
final positioning. The tables below include the t_BK and t_VD
aperture delays.
D7
D6
D5
φ1 Aperture Delay
0
0
0
3.5ns (default)
0
0
1
5.5ns
0
1
0
7.5ns
0
1
1
9.5ns
1
0
0
11.5ns
1
0
1
13.5ns
1
1
0
15.5ns
1
1
1
17.5ns
Table 13. Programmable φ1 Delays
D4
D3
D2
φ2 Aperture Delay
0
0
0
2.7ns (default)
0
0
1
4.7ns
0
1
0
6.7ns
0
1
1
8.7ns
1
0
0
10.7ns
1
0
1
12.7ns
1
1
0
14.7ns
1
1
1
16.7ns
Table 14. Programmable φ2 Delays
The aperture delay of φ2 also delays the output data bus
DB[9:0]. Digital output data is updated on the falling
edge of φ2 as shown in Figure 10. Data is valid after t_DL
plus the change in φ2 aperture delay. For example, if
D[4:2] equals 001b, then data is valid at t_DL + 2ns. (t_DL
is shown in Figure 6).
Rev. 2.00
17