XR19L212 Datasheet, PDF (17/52 Pages) Exar Corporation – TWO CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

XR19L212
REV. 1.0.0
TWO CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
2.15 Auto CTS Flow Control
Automatic CTS flow control is used to prevent data overrun to the remote receiver FIFO. The CTS input is
monitored to suspend/restart the local transmitter. The auto CTS flow control feature is selected to fit specific
application requirement (see Figure 11):
• Enable auto CTS flow control using EFR bit-7.
If using the Auto CTS interrupt:
• Enable CTS interrupt through IER bit-7 (after setting EFR bit-4). The UART issues an interrupt when the CTS
pin is de-asserted: ISR bit-5 will be set to 1, and UART will suspend transmission as soon as the stop bit of
the character in process is shifted out. Transmission is resumed after the CTS input is re-asserted, indicating
more data may be sent.
FIGURE 11. AUTO RTS AND CTS FLOW CONTROL OPERATION
The signals shown in this figure are the signals at the UART and not at the RS-232 transceiver.
Local UART
UARTA
Remote UART
UARTB
Receiver FIFO
Trigger Reached
RXA
TXB
Transmitter
Auto RTS
Trigger Level
Transmitter
RTSA#
TXA
CTSB#
RXB
Auto CTS
Monitor
Receiver FIFO
Trigger Reached
Auto CTS
Monitor
CTSA#
RTSB#
Auto RTS
Trigger Level
RTSA#
CTSB#
TXB
Assert RTS# to Begin
Transmission
1
ON
2
7
ON
3
OFF
8 ^OFF
10 ON
11
ON
Data Starts
4
RXA FIFO
Receive
INTA
(RXA FIFO
Data ^{RX FIFO}
5
Trigger Level
Interrupt)
6 _Suspend ^Restart
9
RTS High
Threshold
RTS Low
Threshold
RX FIFO
12 _{Trigger Level}
RTSCTS1
The local UART (UARTA) starts data transfer by asserting RTSA# (1). RTSA# is normally connected to CTSB# (2) of
remote UART (UARTB). CTSB# allows its transmitter to send data (3). TXB data arrives and fills UARTA receive FIFO
(4). When RXA data fills up to its receive FIFO trigger level, UARTA activates its RXA data ready interrupt (5) and con-
tinues to receive and put data into its FIFO. If interrupt service latency is long and data is not being unloaded, UARTA
monitors its receive data fill level to match the upper threshold of RTS delay and de-assert RTSA# (6). CTSB# follows
(7) and request UARTB transmitter to suspend data transfer. UARTB stops or finishes sending the data bits in its trans-
mit shift register (8). When receive FIFO data in UARTA is unloaded to match the lower threshold of RTS delay (9),
UARTA re-asserts RTSA# (10), CTSB# recognizes the change (11) and restarts its transmitter and data flow again until
next receive FIFO trigger (12). This same event applies to the reverse direction when UARTA sends data to UARTB
with RTSB# and CTSA# controlling the data flow.
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