XRT75L02 Datasheet, PDF (14/50 Pages) Exar Corporation – TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER

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REV. 1.0.3
XRT75L02
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
MICROPROCESSOR SERIAL INTERFACE - (HOST MODE)
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
27
SDO
RxMON
I/O Serial Data Output:
This pin serially outputs the contents of the specified Command Register during
Read Operations. The data is updated on the falling edge of the SClk and this
pin is tri-stated upon completion of data transfer.
NOTE: If configured in Hardware Mode, this pin functions as RxMON.
97
RESET
I Register Reset:
Setting this input pin "Low" causes to reset the contents of the Command Reg-
isters to their default settings and default operating configuration
NOTE: This pin is internally pulled up.
28
INT
LOSMUT
I/O INTERRUPT Output:
A transition to “Low” indicates that an interrupt has been generated. The inter-
rupt function can be disabled by setting the interrupt enable bit to “0” in the
Channel Control Register.
NOTES:
1. In Hardware mode, this pin functions as LOSMUT.
2. This pin will remain asserted “Low” until the interrupt is serviced.
JITTER ATTENUATOR INTERFACE
PIN #
15
SIGNAL NAME
JA1
TYPE
I
DESCRIPTION
Jitter Attenuator Select 1:
In Hardware Mode, this pin along with the pin JA0 configures the Jitter Attenua-
tor as shown in the table.
16
JATx/Rx
14
JA0
JA0
JA1
Mode
0
0
16 bit FIFO
0
1
32 bit FIFO
1
0
Disable Jitter
Attenuator
1
1
Disable Jitter
Attenuator
NOTE: This pin is internally pulled down.
I
Jitter Attenuator Path Select
In Hardware Mode, tie this pin “High” to select the Jitter Attenuator in the Trans-
mit Path . Connect this pin “Low” to select the Jitter Attenuator in the Receive
Path. This applies to all channels.
NOTE: This pin is internally pulled down.
I
Jitter Attenuator Select 0:
In Hardware Mode, this pin along with pin JA1 configures the Jitter Attenuator
as shown in the above table.
NOTE: This pin is internally pulled down.
12