RFM64W Datasheet, PDF (61/75 Pages) List of Unclassifed Manufacturers – ISM TRANSCEIVER MODULE

RFM 64W
ADVANCED COMMUNICATIONS & SENSING
Tx_irq_1
2 13
Fifofull
/Fifoempty
1 13
0 13
Fifo_fill_method 7
14
Fifo_fill
6
14
Tx_done
5
14
Fifo_overrun_clr 4
13
Res
3 14
RSSI_irq
2
14
PLL_locked
1 14
PLL_lock_en
0 14
RSSI_irq_thresh 7-0 15
IRQ_1 source in Tx mode:
If Data_mode(1:0) = 00 (Continuous mode):
r/w x =>DCLK
If Data_mode(1:0) = 01 (Buffered mode) or 1x (Packet mode):
0 => Fifofull (d)
1 => Tx_done
r
Fifofull IRQ source
Goes high when FIFO is full.
r
/Fifoempty IRQ source
Goes low when FIFO is empty
FIFO filling method (Buffered mode only):
r/w 0 =>Automatically starts when a sync word is detected (d)
1 =>Manually controlled by Fifo_fill
FIFO filling status/control (Buffered mode only):
„ If Fifo_fill_method = ‘0’: (d)
r/w/
c
Goes high when FIFO is being filled (sync word has been detected)
Writing ‘1’ clears the bit and waits for a new sync word (if Fifo_overrun_clr=0)
„ If Fifo_fill_method = ‘1’:
0 =>Stop filling the FIFO
1 =>Start filling the FIFO
r
Tx_done IRQ source
Goes high when the last bit has left the shift register.
r/w/ Goes high when an overrun error occurred.
c
Writing a 1 anytime clears flag (if set) and launches a new Rx or Tx process
(d): “0”, should be set to “1”.
r/w Note: “0” disables the RSSI IRQ source. It can be left enabled at any time, and
the user can choose to map this interrupt to IRQ0/IRQ1 or not.
r/w/
c
RSSI IRQ source:
Goes high when a signal above RSSI_irq_thresh is detected
Writing ‘1’ clears the bit
PLL status:
r/w/ 0 =>not locked
c
1 =>locked
Writing a ‘1’ clears the bit
PLL_lock detect flag mapped to pin:
r/w 0 => Lock detect disabled, pin is HI
1 =>Lock detect enabled(d)
RSSI threshold for interrupt (coded as RSSI)
(d): “00000000”
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