RFM64W Datasheet, PDF (43/75 Pages) List of Unclassifed Manufacturers – ISM TRANSCEIVER MODULE

ADVANCED COMMUNICATIONS & SENSING
5.3.5. uC Connections
RFM64W
DATA
IRQ_0
IRQ_1 (DCLK)
NSS_CONFIG
uC
SCK
MOSI
MISO
RFM 64W
Figure 37: uC Connections in Continuous Mode
Note that some connections may not be needed depending on the application:
„ IRQ_0: if Sync and RSSI interrupts are not used. In this case, leave floating.
„ IRQ_1: if the module is never used in Tx FSK mode (DCLK connection is not compulsory in Rx and Tx
OOK
modes). In this case, leave floating.
„ MISO: if no read register access is needed. In this case, pull-up to VDD through a 100 kΩ resistor.
In addition, NSS_DATA pin (unused in continuous mode) should be pulled-up to VDD through a 100 kΩ resistor.
Please refer to Table 13 for RFM64W’s pins configuration
5.3.6. Continuous Mode Example
„ Configure all data processing related registers listed below appropriately. In this example we assume that both
Bit synchronizer and Sync word recognition are on.
Table 19: Relevant Configuration Registers in Continuous Mode (data processing related only)
MCParam
IRQParam
RXParam
SYNCParam
Data_mode_x
Rx_stby_irq_0
Sync_on
Sync size
Sync_tol
Sync_value
Tx
Rx ^Description
X
X Defines data operation mode (=> Continuous)
X Defines IRQ_0 source in Rx mode
X Enables Sync word recognition
X Defines Sync word size
X Defines the error tolerance on Sync word recognition
X Defines Sync word value
Tx Mode:
„ Go to Tx mode (and wait for Tx to be ready, see Figure 50)
„ Send all packet’s bits on DATA pin synchronously with DCLK signal provided on IRQ_1
„ Go to Sleep mode
Rx Mode:
„ Program Rx interrupts: IRQ_0 mapped to Sync (Rx_stby_irq_0=”00”) and IRQ_1 mapped to DCLK (Bit
synchronizer enabled)
„ Go to Rx mode (note that Rx is not ready immediately, see Figure 49)
„ Wait for Sync interrupt
„ Get all packet bits on DATA pin synchronously with DCLK signal provided on IRQ_1
„ Go to Sleep mode
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