KXTIK-1004 Datasheet, PDF (6/54 Pages) List of Unclassifed Manufacturers – 2g/4g/8g Tri-axis Digital Accelerometer Specifications

± 2g / 4g / 8g Tri-axis Digital
Accelerometer Specifications
PART NUMBER:
KXTIK-1004
Rev. 2
Dec-2011
Application Schematic
IO Vdd
C₂
SCL
16 15 14
1
13
2
12
3
KXTIK ¹¹
4
10
5
9
678
C₁
INT
Table 4. KXTIK Pin Descriptions
Pin
Name
Description
1
IO Vdd
The power supply input for the digital communication bus. Optionally decouple this pin to ground with
a 0.1uF ceramic capacitor.
2
RES
Reserved – Not Connected Internally
3
DNC
Reserved – Do Not Connect
4
SCL
I²C Serial Clock
5
GND
Ground
6
SDA
I²C Serial Data
7
NC
Not Internally Connected – Can be connected to Vdd, GND or Float
8
RES
Reserved – connect to IO Vdd
9
RES
Reserved – Internally connected to GND – Can be connected to GND or Float
10
RES
Reserved – Internally connected to GND – Can be connected to GND or Float
11
INT
Physical Interrupt
12
GND
Ground
13
RES
Reserved – Internally connected to GND – Can be connected to GND or Float
14
Vdd
The power supply input. Decouple this pin to ground with a 0.1uF ceramic capacitor.
15
NC
Not Internally Connected – Can be connected to Vdd, GND or Float
16
RES
Reserved – Internally connected to GND – Can be connected to GND or Float
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