RF69 Datasheet, PDF (50/81 Pages) List of Unclassifed Manufacturers – Low Power Integrated UHF Transceiver with On-Chip +20dBm PA

RF69
5.4. Continuous Mode
5.4.1. General Description
As illustrated in Figure 29, in Continuous mode the NRZ data to (from) the (de)modulator is directly accessed by the uC on
the bidirectional DIO2/DATA pin. The FIFO and packet handler are thus inactive.
Tx/Rx
Data
Rx
SYNC
RECOG.
CONTROL
DIO0
DIO1/DCLK
DIO2/DATA
DIO3
DIO4
DIO5
SPI
NSS
SCK
MOSI
MISO
Figure 29. Continuous Mode Conceptual View
5.4.2. Tx Processing
In Tx mode, a synchronous data clock for an external uC is provided on DIO1/DCLK pin. Clock timing with respect to the
data is illustrated in Figure 30. DATA is internally sampled on the rising edge of DCLK so the uC can change logic state
anytime outside the grayed out setup/hold zone.
DATA
(NRZ)
T_DATA T_DATA
DCLK
Figure 30. Tx Processing in Continuous Mode
Note the use of DCLK is required when the modulation shaping is enabled (see section 3.3.5).
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