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RF69 Datasheet, PDF (25/81 Pages) List of Unclassifed Manufacturers – Low Power Integrated UHF Transceiver with On-Chip +20dBm PA
RF69
Table 13 Receiver Performance Summary
Input Power
Pin
Pin < AgcThresh1
AgcThresh1 < Pin < AgcThresh2
AgcThresh2 < Pin < AgcThresh3
AgcThresh3 < Pin < AgcThresh4
AgcThresh4 < Pin < AgcThresh5
AgcThresh5 < Pin
Gain
Setting
G1
G2
G3
G4
G5
G6
Receiver Performance (typ)
P-1dB
[dBm]
NF
[dB]
IIP3
[dBm]
IIP2
[dBm]
-37
7
-18
+35
-31
13
-15
+40
-26
18
-8
+48
-14
27
-1
+62
>-6
36
+13
+68
>0
44
+20
+75
3.4.3.1. RssiThreshold Setting
For correct operation of the AGC, RssiThreshold in RegRssiThresh must be set to the sensitivity of the receiver. The
receiver will remain in WAIT mode until RssiThreshold is exceeded.
Note When AFC is enabled and performed automatically at the receiver startup, the channel filter used by the receiver
during the AFC and the AGC is RxBwAfc instead of the standard RxBw setting. This may impact the sensitivity of
the receiver, and the setting of RssiThreshold accordingly
3.4.3.2. AGC Reference
The AGC reference level is automatically computed in the RF69, according to:
AGC Reference [dBm] = -174 + NF + DemodSnr +10.log(2*RxBw) + FadingMargin [dBm]
With:
 NF = 7dB
: LNA‟ s Noise Figure at maximum gain
 DemodSnr = 8 dB : SNR needed by the demodulator
 RxBw
: Single sideband channel filter bandwidth
 FadingMargin = 5 dB : Fading margin
3.4.4. Continuous-Time DAGC
In addition to the automatic gain control described in section 3.4.3, the RF69 is capable of continuously adjusting its gain
in the digital domain, after the analog to digital conversion has occured. This feature, named DAGC, is fully transparent to
the end user. The digital gain adjustment is repeated every 2 bits, and has the following benefits:
 Fully transparent to the end user
 Improves the fading margin of the receiver during the reception of a packet, even if the gain of the LNA is frozen
 Improves the receiver robustness in fast fading signal conditions, by quickly adjusting the receiver gain (every 2 bits)
 Works in Continuous, Packet, and unlimited length Packet modes
The DAGC is enabled by setting RegTestDagc to 0x20 for low modulation index systems (i.e. when AfcLowBetaOn=1,
refer to section 3.4.16), and 0x30 for other systems. It is recommended to always enable the DAGC.
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