RF69 Datasheet, PDF (37/81 Pages) List of Unclassifed Manufacturers – Low Power Integrated UHF Transceiver with On-Chip +20dBm PA

RF69
Rx startup request
(sequencer or user)
TS_RE
XO Started and PLL is locked
ModeReady
RxReady
Analog FE‟ s
group delay
Tana
Channel Filter‟
s
group delay
Tcf
DC Cutoff‟
s
group delay
RSSI
RSSI
sampling sampling
Tdcc
Trssi
Trssi
Reception of Packet
Received Packet Preamble may start
Figure 18. Rx Startup - No AGC, no AFC
Rx startup request
(sequencer or user)
TS_RE_AGC
The LNA gain is adjusted by
the AGC, according to the
RSSI result
XO Started and PLL is locked
ModeReady
Analog FE‟ s
group delay
Tana
Channel Filter‟
s
group delay
Tcf
DC Cutoff‟
s
group delay
RSSI
RSSI
sampling sampling
Tdcc
Trssi
Trssi
Channel Filter‟
s
group delay
Tcf
DC Cutoff‟
s
group delay
RSSI
sampling
Reception of Packet
Tdcc
Trssi
RxReady
Received Packet Preamble may start
Figure 19. Rx Startup - AGC, no AFC
Rx startup request
(sequencer or user)
TS_RE_AGC&AFC
The LNA gain is adjusted by
the AGC, according to the
RSSI result
Carrier Frequency is adjusted
by the AFC
XO Started and
PLL is locked
Analog FE‟
s
group delay
Channel Filter‟
s
group delay
DC Cutoff‟ RSSI
RSSI Channel Filter‟
s
sampling sampling _s
group delay
group delay
DC Cutoff‟ RSSI
s
sampling
group delay
AFC
PLL Channel Filter‟
lock _s
group delay
DC Cutoff‟ s
group delay
Reception of Packet
Tana
Tcf
Tdcc
Trssi
Trssi
Tcf
Tdcc
Trssi Tafc Tpllafc
Tcf
ModeReady
Tdcc
RxReady
Received Packet Preamble may start
Figure 20. Rx Startup - AGC and AFC
The different timings shown above are as follows:
 Group delay of the analog front end:
Tana = 20 us
 ^{Channel filter‟ s group delay in FSK mode:} Tcf = 21 / (4.RxBw)
 ^{Channel filter‟ s group delay in OOK}
Tcf = 34 / (4.RxBw)
 ^{mode: DC Cutoff‟ s group delay:}
Tdcc = max(8 , 2^(round(log2(8.RxBw.Tbit)+1)) / (4.RxBw)
 PLL lock time after AFC adjustment:
Tpllafc = 5 / PLLBW (PLLBW = 300 kHz)
 AFC sample time:
Tafc = 4 x Tbit
(also denoted TS_AFC in the general specification)
 RSSI sample time:
Trssi = 2 x int(4.RxBw.Tbit)/(4.RxBw) (aka TS_RSSI)
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