NUC910ABN Datasheet, PDF (307/669 Pages) Nuvoton Technology Corporation – 32-bit ARM926EJ-S Based Microcontroller

NUC910ABN
32-BIT ARM926EJ-S BASED MCU
NAND Flash Control and Status Register (SMCSR)
Register
SMCSR
Address
0xB000_D0A0
R/W
R/W
Description
NAND Flash Control and Status Register
Reset Value
0x0600_0080
31
30
29
Reserved
23
22
21
15
7
ECC4CHK
14
13
Reserved
6
5
Reserved ECC4_EN
28
27
20
19
Reserved
12
11
4
DBW
3
PSIZE
26
25
SM_CS
18
17
24
WP_
16
10
9
MECC4
2
1
DWR_EN DRD_EN
8
0
SW_RST
Bits
[26:25]
Descriptions
SM_CS
Smart Media Card Select
00 = Select card 0. (–CE0 will be active)
01 = Select card 1. (–CE1 will be active)
11 = No card will be selected.
[24]
WP_
Write Protect Pin Control
0 = Force –WP pin to LOW (0) level.
1 = Force –WP pin to HIGH (1) level.
[11:8]
MECC4
Mask ECC4 During Write Page Data
These 4 bits indicate NAND controller to write out ECC4 checksum or just 10
bytes 0xFF for each field.
0 = Do not mask the ECC4 checksum for each field.
1 = Mask ECC4 checksum and write out 10 bytes 0xFF to NAND.
None Used Field ECC4 Check After Read Page Data
0 = Disable. NAND controller will always check ECC4 result for each field, no
matter it is used or not.
[7]
ECC4CHK
1 = Enable. NAND controller will check 1’s count for byte 2, 3 of redundant
data in each field. If count value is greater than 8, NAND controller will
treat this field as none used field; otherwise, it’s used. If that field is none
used field, NAND controller will ignore its ECC4 check result.
Publication Release Date: Jun. 18, 2010
307
Revision: A4