W79E632A Datasheet, PDF (19/79 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E632A/W79L632A
ISP Data Buffer
Bit:
7
6
5
4
3
2
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Mnemonic: SFRFD
Address: AEh
In ISP mode, read/write a specific byte ROM content must go through SFRFD register.
ISP Operation Modes
Bit:
7
6
5
BANK WFWIN NOE
4
3
2
1
0
NCE CTRL3 CTRL2 CTRL1 CTRL0
Mnemonic: SFRCN
Address: AFh
BANK: Select APFlash banks for ISP. Set it 1 access to APFlash1, clear it to APFlash0.
WFWIN: Destination ROM bank for programming, erasure and read. 0 = APFlashx, 1 = LDFlash.
NOE: Flash EPROM output enable.
NCE: Flash EPROM chip enable.
CTRL[3:0]: Mode Selection.
ISP MODE
BANK WFWIN NOE NCE CTRL<3:0>
Erase 4KB LDFlash
0
Erase 64K APFlash0
0
Erase 64K APFlash1
1
Program 4KB LDFlash
0
Program 64KB APFlash0
0
Program 64KB APFlash1
1
Read 4KB LDFlash
0
Read 64KB APFlash0
0
Read 64KB APFlash1
1
1
1
0
0
1
0
0
1
0
1
1
0
0
1
0
0
1
0
1
0
0
0
0
0
0
0
0
0010
0010
0010
0001
0001
0001
0000
0000
0000
SFRAH,
SFRAL
X
X
X
Address in
Address in
Address in
Address in
Address in
Address in
SFRFD
X
X
X
Data in
Data in
Data in
Data out
Data out
Data out
Port 3
Bit:
7
6
5
4
3
2
1
0
P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0
Mnemonic: P3
Address: B0h
P3.7-0: General purpose I/O port. Each pin also has an alternate input or output function. The
alternate functions are described below.
P3.7 RD Strobe for read from external RAM
P3.6 WR Strobe for write to external RAM
P3.5 T1 Timer/counter 1 external count input
P3.4 T0 Timer/counter 0 external count input
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Publication Release Date: Nov. 11, 2009
Revision A10