AT45DQ161 Datasheet, PDF (15/81 Pages) List of Unclassifed Manufacturers – 16-Mbit DataFlash (with Extra 512-Kbits), 2.3V or 2.5V Minimum SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support

The CS pin must be deasserted on a byte boundary (multiples of eight bits); otherwise, the operation will be aborted and
no data will be programmed. The programming of the data bytes is internally self-timed and should take place in a
maximum time of t_P (the program time will be a multiple of the t_BP time depending on the number of bytes being
programmed). During this time, the RDY/BUSY bit in the Status Register will indicate that the device is busy.
The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to program
properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register.
6.8 Page Erase
The Page Erase command can be used to individually erase any page in the main memory array allowing the Buffer to
Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program through Buffer 1
command to be utilized at a later time.
To perform a Page Erase with the standard DataFlash page size (528 bytes), an opcode of 81h must be clocked into the
device followed by three address bytes comprised of 2 dummy bits, 12 page address bits (PA11 - PA0) that specify the
page in the main memory to be erased, and 10 dummy bits.
To perform a Page Erase with the binary page size (512 bytes), an opcode of 81h must be clocked into the device
followed by three address bytes comprised of three dummy bits, 12 page address bits (A20 - A9) that specify the page in
the main memory to be erased, and 9 dummy bits.
When a low-to-high transition occurs on the CS pin, the device will erase the selected page (the erased state is a Logic
1). The erase operation is internally self-timed and should take place in a maximum time of t_PE. During this time, the
RDY/BUSY bit in the Status Register will indicate that the device is busy.
The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If
an erase error arises, it will be indicated by the EPE bit in the Status Register.
6.9 Block Erase
The Block Erase command can be used to erase a block of eight pages at one time. This command is useful when
needing to pre-erase larger amounts of memory and is more efficient than issuing eight separate Page Erase
commands.
To perform a Block Erase with the standard DataFlash page size (528 bytes), an opcode of 50h must be clocked into the
device followed by three address bytes comprised of 2 dummy bits, 9 page address bits (PA11 - PA3), and 13 dummy
bits. The 9 page address bits are used to specify which block of eight pages is to be erased.
To perform a Block Erase with the binary page size (512 bytes), an opcode of 50h must be clocked into the device
followed by three address bytes comprised of three dummy bits, 9 page address bits (A20 - A12), and 12 dummy bits.
The 9 page address bits are used to specify which block of eight pages is to be erased.
When a low-to-high transition occurs on the CS pin, the device will erase the selected block of eight pages. The erase
operation is internally self-timed and should take place in a maximum time of t_BE. During this time, the RDY/BUSY bit in
the Status Register will indicate that the device is busy.
The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If
an erase error arises, it will be indicated by the EPE bit in the Status Register.
AT45DQ161 [PRELIMINARY DATASHEET] 15
8790B–DFLASH–10/2013