W77L32 Datasheet, PDF (13/76 Pages) Winbond – 8-BIT MICROCONTROLLER

W77L32/W77L032A/W77M032A
IE0: Interrupt 0 edge detect: Set by hardware when an edge/level is detected on INT0 . This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise it follows the pin.
IT0: Interrupt 0 type control: Set/cleared by software to specify falling edge/ low level triggered
external inputs.
6.3.1.3 Timer Mode Control
Bit:
7
6
5
4
3
2
1
0
GATE _{C/ T}
M1
M0 GATE _{C/ T}
M1
M0
Mnemonic: TMOD
TIMER1
TIMER0
Address: 89h
GATE: Gating control: When this bit is set, Timer/counter x is enabled only while INTx pin is high and
TRx control bit is set. When cleared, Timer x is enabled whenever TRx control bit is set.
C/ T : Timer or Counter Select: When cleared, the timer is incremented by internal clocks. When set,
the timer counts high-to-low edges of the Tx pin.
M1, M0: Mode Select bits:
M1 M0
0
0
0
1
1
0
1
1
Mode
Mode 0: 8-bits with 5-bit prescale.
Mode 1: 16-bits, no prescale.
Mode 2: 8-bits with auto-reload from THx
Mode 3: (Timer 0) TL0 is an 8-bit timer/counter controlled by the
standard Timer 0 control bits. TH0 is a 8-bit timer only controlled by
Timer 1 control bits. (Timer 1) Timer/counter is stopped.
Timer 0 LSB
Bit:
7
6
5
4
3
2
1
0
TL0.7 TL0.6 TL0.5 TL0.4 TL0.3 TL0.2 TL0.1 TL0.0
Mnemonic: TL0
Address: 8Ah
TL0.7 − 0: Timer 0 LSB
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Publication Release Date: April 17, 2007
Revision A6