HMS87C5216 Datasheet, PDF (59/76 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR UR(Universal Remocon) & WIRELESS KEYBOARD

HMS87C5216
WDTR
7
Watch DOG Timer Register
0
-
WDTCL WDTR5 WDTR4 WDTR3 WDTR2 WDTR1 WDTR0 W <00C8 h>
Determine Interval of IFWDT
Interval of IFWDT = Value of WDTR × Interval of IFBIT
WDTCL
0
1
Watch Dog Timer Operation
free-run
Automatically cleared, after one machine cycle
14.2 WDT Interrupt Interval
WDT Interrupt (IFWDT) interval is determined by the interrupt
IFBIT interval of Basic Interval Timer and the value of WDT
Register.
-Interval of IFWDT = (IFBIT interval) * (WDTR value)
-Interval of IFWDT : 512 us * 1 = 512 us (MIN>)
-65,536us * 63 = 4,128,768 us (MAX>)
As IFBIT (Basic Interval Timer Interrupt Request) is used for in-
put clock of WDT, Input clock cycle is possible from 512 us to
65,536 us by BTS. (at fex = 4MHz)
*At Hardware reset time ,WDT starts automatically. Therefore,
the user must select the CKCTLR, WDTR before WDT over-
flow.
-Reset WDTR value = 0F h,15
-interval of WDT = 65,536 * 15 = 983040 us
(about 1second )
7
CKCTLR
-
Clock Control Register
0
-
WDTON ENPCK BTCL
BTS2
BTS1
BTS0
W <00C7 h>
BTS2 BTS1 BTS0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
WDT Input clock
512 us
1,024 us
2,048 us
4,096 us
8,192 us
16,384 us
32,768 us
65,536 us
Max. Interval of WDT
Output (*note1)
32,756 us
64,512 us
129,024 us
258,048 us
516,096 us
1,032,192 us
2,064,384 us
4,128,768 us
Note: When WDTR Register value is 63 (3F h)
(Caution) : Do not use ``0`` for WDTR Register value.
Device come into the reset state by WDT
SEP. 2004 Ver 1.01