HMS87C5216 Datasheet, PDF (37/76 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR UR(Universal Remocon) & WIRELESS KEYBOARD

HMS87C5216
7
CKCTLR
-
Clock Control Register
0
-
WDTON ENPCK BTCL
BTS2
BTS1
BTS0
W <00C7 h>
Figure 12-2 BTCL mode of B.I.T
BTCL
0
1
Periphral clock
free-run
Automatically cleared, after one cycle
(2) Input clock selection of B.I.T
The input clock of B.I.T can be selected from the prescaler within
a range of 2us to 256us by clock input selection bits
(BTS2~BTS0). (at fex = 4MHz). In reset state, or power on reset,
BTS2=``1``, BTS1=``1``, BTS0=``1`` to secure the longest oscil-
lation stabilization time. B.I.T can generate the wide range of ba-
sic interval time interrupt request (IFBIT) by selecting prescaler
output. Interrupt interval can be selected to kinds of interval time
as shown in
Figure 12-3.
7
CKCTLR
-
Clock Control Register
0
-
WDTON ENPCK BTCL
BTS2
BTS1
BTS0
W <00C7 h>
BTS2
0
0
0
0
1
1
1
1
BTS1
0
0
1
1
0
0
1
1
BTS0
0
1
0
1
0
1
0
1
B.I.T. Input clock
PS3 (2us)
PS4 (4us)
PS5 (8us)
PS6 (16us)
PS7 (32us)
PS8 (64us)
PS9 (128us)
PS10 (256us)
Standby release time
512 us
1,024 us
2,048 us
4,096 us
8,192 us
16,384 us
32,768 us
65,536 us
Figure 12-3 Basic Interval Timer Interrupt Time
(3) Reading Basic Interval Timer
By reading of the Basic Interval Timer Register (BITR), we can
read counter value of B.I.T. Because B.I.T can be cleared or read,
the spending time up to maximum 65.5ms can be available. B.I.T
is read-only register. If B.I.T register is written, then CKCTLR
register with same address is written.
SEP. 2004 Ver 1.01