HMS87C5216 Datasheet, PDF (54/76 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR UR(Universal Remocon) & WIRELESS KEYBOARD

HMS87C5216
Flag change by BRK execution
PSW
N
V
G
B
H
I
Z
C
set
reset
PSW
N
V
G
1
H
0
Z
C
(Right after BRK execution)
Interrupt vector of BRK instruction is shared by vector of Table
Call (TCALL0). When both instruction of BRK and TCALL0
are used, as shown in Figure 13-4each processing routine is
judged by contents of B flag. There is no instruction to reset di-
rectly B flag.
BRK or
TCALL0
B flag
0
1
BRK INTERRUPT ROUTINE
TCALL0 ROUTINE
RETI
RET
Figure 13-4 Execution of BRK or TCALL0
13.6 MULTIPLE INTERRUPT
If there is an interrupt, Interrupt Mask Enable Flag is automatical-
ly cleared before entering the Interrupt Service Routine. After
then, no interrupt is accepted. If EI instruction is executed, inter-
rupt mask enable bit becomes ``1``, and each enable bit can ac-
cept interrupt request. When two or more interrupts are generated
simultaneously, the highest priority interrupt set by Interrupt
Mode Register is accepted.
13.7 Key Scan Input Processing
(1) Standby Mode Release Register (SMRR)
Key Scan Interrupt is generated by detecting low or high Input
from each Input pin (R0, R1) is one of the sources which release
standby (SLEEP, STOP) mode. Key Scan ports are all 16bit
which are controlled by Standby Mode Release Register
(SMRR0, SMRR1). Key Input is considered as Interrupt, there-
fore, KSCNE bit of IEHN should be set for correct interrupt ex-
SEP. 2004 Ver 1.01