HMS87C5216 Datasheet, PDF (23/76 Pages) List of Unclassifed Manufacturers – CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR UR(Universal Remocon) & WIRELESS KEYBOARD

HMS87C5216
9.3 Data Memory
Figure 9-7 shows the internal Data Memory space available. Data
Memory is divided into two groups, a user RAM (including
Stack) and control registers.
0000H
00BFH
00C0H
00FFH
0100H
USER
MEMORY
PAGE0
CONTROL
REGISTERS
USER
MEMORY
(including STACK)
PAGE2
017FH
Figure 9-7 Data Memory Map
User Memory
The HMS87C5216 has 330 × 8 bits for the user memory (RAM).
Control Registers
The control registers are used by the CPU and Peripheral function
blocks for controlling the desired operation of the device. There-
fore these registers contain control and status bits for the interrupt
system, the timer/ counters, analog to digital converters and I/O
ports. The control registers are in address range of 0C0_H to 0FF_H.
Note that unoccupied addresses may not be implemented on the
chip. Read accesses to these addresses will in general return ran-
dom data, and write accesses will have an indeterminate effect.
More detailed informations of each register are explained in each
peripheral section.
Note: Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction.
Example; To write at CKCTLR
LDM CKCTLR,#09H ;Divide ratio ÷16
Note: Several names are given at same address. Refer to-
Address Symbol R/W
RESET
Value
Addressing
mode
Address Symbol
0C0H
0C1H
0C2H
0C3H
0C4H
0C5H
0C6H
0C7H
0C7H
0C8H
0C9H
0CAH
0CBH
0CCH
0CDH
0CEH
0CFH
0D0H
0D1H
0D2H
0D3H
0D4H
0D5H
0D5H
0D6H
0D6H
0D7H
0D8H
0D8H
0D9H
0D9H
0DAH
0DCH
0DDH
0DEH
0DFH
0E0H
0E1H
0E4H
0E5H
0E6H
0E7H
0E8H
0EEH
0EFH
R0
R0DR
R1
R1DR
R2
R2DR
TMR1
CKCTLR
BITR
WDTR
PSR
RCWTR
IESR
IENL
IRQL
IENH
IRQH
TM0
TM1
TM2
T0HMD
T0HLD
T0MC
T0LMD
T0LC
T0LLD
T1HD
T1C
T1LD
T2C
T2D
TM01
KSR0
KSR1
R10D
R2OD
R3OD
R4OD
R0OD
R3
R3DR
R4
R4DR
TMR2
LVDR
R/W
RESET
Value
Addressing
mode
R/W Undefined byte, bit¹
W 0000_0000 _byte²
R/W Undefined _{byte, bit}
W 0000_0000 _byte
R/W Undefined _{byte, bit}
W 0000_0000 _byte
W 0000_0000 _byte
W --11_0111 _byte
R 0000_0000 _byte
W -000_1111 _byte
W --00_0000 _byte
W ----_1000 _byte,bit
W --00_00-- _byte,bit
R/W -000_-0-- _byte,bit
R/W -000_-0-- _byte,bit
R/W 000-_000- _byte,bit
R/W 000-_000- _byte,bot
R/W 0000_0000 byte, bit
R/W 0000_-000 byte, bit
R/W ---0_0000 byte, bit
W Undefined byte
W Undefined byte
R 0000_0000 byte
W Undefined byte
R 0000_0000 byte
W Undefined byte
W Undefined byte
R 0000_0000 byte
W Undefined byte
R 0000_0000 byte
W Undefined byte
R/W 0000_0000 byte
W 00000_000 byte
W 0000_0000 byte
W 0000_0000 byte
W 0000_0000 byte,bit
W ^0000_0000
W ^--00_0000
W ^0000_0000
R/W ^Undefined
W ^0000_0000
R/W ^Undefined
W --00_0000
R 0000_0000
R _{---_-00-}
byte
byte
byte
byte,bit
byte
byte,bit
byte
byte
byte
Table 9-1 Control Registers
SEP. 2004 Ver 1.01