SLGSSTVF16859 Datasheet, PDF (4/11 Pages) List of Unclassifed Manufacturers – DDR 13 to 26 Bit Registered Buffer

SLGSSTVF16859H/V
Absolute Maximum Ratings
Storage Temperature. . . . . . . . . . . . . . . . . . . . .-65^oC to +150^oC
Supply Voltage. . . . . . . . . . . . . . . . .. . . . . . . . .-0.5 to 3.6V
Input Voltage^1,2. . . . . . . . . . . . . . . . . . . . . . . . .-0.5 to V_DD + 0.5
Output Voltage^1,2. . . . . . . . . . . . . . . . . . . . . . -0.5 to V_DDQ +0.5
Input Clamp Current. . . . . . . . . . . . . . .. . . . . .-50 mA
Output Clamp Current. . . . . . . . . . . . . . . . . . +50 mA
Continuous Output Current. . . . . . . . . . . . . . . +50 mA
V_DD, V_DDQ, or GND Current/Pin. . . .. . . . . . +100 mA
TSSOP (H) Package Thermal Impedance³. . . . 55^oC/W
VLLD2 (V) Package Thermal Impedance⁴. . . .22^oC/W
Notes:
1. The input and output negative voltage ratings
may be exceded if the input and output clamp
currents are within limits.
2. Limited to 3.6V Max.
3. The package thermal impedance is calculated
according to JESD 51-7
4. The package thermal impedance is calculated
according to JESD 51-5.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to this device. These
ratings are stress specifications only and functional operation of the device at these or other conditions above
those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating con-
ditions for extended periods may affect product reliability.
Recommended Operating Conditions:
PARAMETER
V_DD
V_DDQ
V_DDQ
V_REF
V_REF
V_TT
V_I
V_{IH (DC)}
V_{IH (AC)}
V_{IL (DC)}
V_{IL (AC)}
V_IH
V_IL
V_ICR
V_ID
V_IX
I_OH
I_OL
T_A
DESCRIPTION
Supply Voltage
Output Supply Voltage
for PC1600/2100/2700
Output Supply Voltage for PC3200
Reference Voltage
for PC1600/2100/2700
Reference Voltage for PC3200
Termination Voltage
Input Voltage
DC Input High Voltage
AC Input High Voltage
DC Input Low Voltage
Data
Inputs
AC Input Low Voltage
Input High Voltage Level
Input Low Voltage Level
RESET
Common mode Input Range CLK,
Differential Input Voltage
CLK
Cross Point Voltage of Differential Clock
Pair
High-Level Output Current
Low-Level Output Current
Operating Free-Air Temperature
MIN
TYP
V_DDQ
2.3
2.5
2.6
1.15
1.25
1.25
V_REF - 0.04
0
V_REF + 0.15
V_REF + 0.31
1.3
V_REF
1.7
0.97
0.36
( V_DD/2) -
0.2
0
MAX
2.7
UNITS
2.7
2.7
1.35
1.35
V_REF + 0.04
V_DD
V_REF - 0.15
V_REF - 0.31
V
0.7
1.53
( V_DD/2) +
0.2
-16
mA
16
70
o_C
Silego Technology Inc.
[phone]
PRELIMINARY
4
Data is subject to change.
May 28, 2003