88E1111 Datasheet, PDF (216/252 Pages) List of Unclassifed Manufacturers – Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver

88E1111
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
4.12 RGMII/RTBI Interface Timing
4.12.1 RGMII AC Characteristics
(For other timing modes see Section 4.12.2 "RGMII/RTBI Delay Timing for different RGMII/RTBI Modes" on page 217.)
Symbol
Parameter
Min
Ty p
Max
Units
TskewT
Data to Clock output Skew (at transmitter) -500
0
500
ps
TskewR
Data to Clock input Skew (at receiver)
1.0
-
2.8
ns
T_CYCLE
T_{CYCLE_}
HIGH1000
T_{CYCLE_HIGH100}
T_{CYCLE_HIGH10}
T_RISE/T_FALL
Clock Cycle Duration
High Time for 1000BASE-T ¹
High Time for 100BASE-T¹
High Time for 10BASE-T¹
Rise/Fall Time (20-80%)
7.2
8.0
8.8
ns
3.6
4.0
4.4
ns
16
20
24
ns
160
200
240
ns
0.75
ns
1. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet’s clock domain as long as
minimum duty cycle is not violated and stretching occurs for no more than three TCYCLE of the lowest speed transitioned
between.
Figure 51: RGMII/RTBI Multiplexing and Timing
GTX_CLK (TXC)
at transmitter
TXD[8:5][3:0]
TXD[7:4][3:0]
TX_EN (TX_CTL)
GTX_CLK (TXC)
at receiver
RX_CLK (RXC)
at transmitter
RXD[8:5][3:0]
RXD[7:4][3:0]
RX_DV (RX_CTL)
RX_CLK (RXC)
at receiver
TXD[3:0]
TXD4
TX_EN
TXD[8:5]
TXD[7:4]
TXD9
TX_ER
TSKEWT
TSKEWR
RXD[3:0]
RXD4
RX_DV
RXD[8:5]
RXD[7:4]
RXD9
RX_ER
TSKEWT
TSKEWR
Doc. No. MV-S100649-00, Rev. E
Page 216
CONFIDENTIAL
Document Classification: Proprietary Information
Copyright © 2004 Marvell
November 19, 2004, Advance