NT256D64S88B1G Datasheet, PDF (16/28 Pages) List of Unclassifed Manufacturers – 184 pin Unbuffered DDR DIMM

NT512D64S8HB1G / NT512D64S8HB1GY / NT512D64S8HB0G
NT256D64S88B1G / NT256D64S88B1GY NT256D64S88B0G
NT128D64SH4B1G / NT512D72S8PB0G (ECC) / NT256D72S89B0G (ECC)
Unbuffered DDR DIMM
Absolute Maximum Ratings
Symbol
Parameter
Rating
Units
V_IN, V_OUT
Voltage on I/O pins relative to V_SS
-0.5 to V_DDQ +0.5
V
V_IN
Voltage on Input relative to V_SS
-0.5 to +3.6
V
V_DD
Voltage on V_DD supply relative to V_SS
-0.5 to +3.6
V
V_DDQ
Voltage on V_DDQ supply relative to V_SS
-0.5 to +3.6
V
T_A
Operating Temperature (Ambient)
0 to +70
°C
T_STG
Storage Temperature (Plastic)
-55 to +150
°C
P_D
Power Dissipation (per device component)
1
W
I_OUT
Short Circuit Output Current
50
mA
Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is stress
rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics and Operating Conditions
T_A= 0°C ~ 70°C; V_DDQ= V_DD= 2.5V±0.2V(PC2100,PC2700); T_A= 0°C ~ 70°C; V_DDQ= V_DD= 2.6V±0.1V(PC3200)
Symbol
V_DD
V_DDQ
V_SS, V_SSQ
V_REF
V_TT
V_{IH (DC)}
V_{IL (DC)}
V_{IN (DC)}
V_{ID (DC)}
I_I
Parameter
Supply Voltage
PC2100, PC2700
PC3200
I/O Supply Voltage
PC2100, PC2700
PC3200
Supply Voltage, I/O Supply Voltage
I/O Reference Voltage
I/O Termination Voltage (System)
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level, CK and CK Inputs
Input Differential Voltage, CK and CK Inputs
Input Leakage Current
Any input 0V ≤ VIN ≤ V_DD;
All other pins not under test = 0V
Min
2.3
2.5
2.3
2.5
0
0.49 x V_DDQ
V_REF – 0.04
V_REF + 0.15
-0.3
-0.3
0.30
Max
2.7
2.7
0
0.51 x V_DDQ
V_REF + 0.04
V_DDQ + 0.3
V_REF - 0.15
V_DDQ + 0.3
V_DDQ + 0.6
-10
10
Units
V
V
V
V
V
V
V
V
V
µA
Notes
1
1
1, 2
1, 3
1
1
1
1, 4
1
Output Leakage Current
I_OZ
DQs are disabled; 0V ≤ Vout ≤ V_DDQ
-10
10
µA
1
Output High Current
I_OH
(V_OUT = V_DDQ -0.373V, min V_REF, min V_TT)
-16.8
-
mA
1
Output Low Current
I_OL
(V_OUT = 0.373, max V_REF, max V_TT)
16.8
-
mA
1
1. Inputs are not recognized as valid until V_REF stabilizes.
2. V_REF is expected to be equal to 0.5 V_DDQ of the transmitting device, and to track variations in the DC level of the same. Peak-to-peak
noise on V_REF may not exceed 2% of the DC value.
3. V_TT is not applied directly to the DIMM. V_TT is a system supply for signal termination resistors, is expected to be set equal to V_REF,
and must track variations in the DC level of V_REF.
4. V_ID is the magnitude of the difference between the input level on CK and the input level on CK.
REV 2.2
Aug 3, 2004
Preliminary
16
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NANYA reserves the right to change products and specifications without notice.