BC41B143A-DS-001PE Datasheet, PDF (83/102 Pages) List of Unclassifed Manufacturers – BlueCpre 4-ROM Single Chip Bluetooth v2.0 System with EDR

Device Terminal Descriptions
Name
CNT_LIMIT
CNT_RATE
SYNC_LIMIT
Bit Position Description
[12:0]
[23:16]
[31:24]
Sets PCM_CLK counter limit.
Sets PCM_CLK count rate.
Sets PCM_SYNC division relative to PCM_CLK.
Table 10.12: PSKEY_PCM_LOW_JITTER_CONFIG Description
10.8 I/O Parallel Ports
Fifteen lines of programmable bi-directional input/outputs (I/O) are provided. PIO[11:8] and PIO[3:0] are powered
from VDD_PIO. PIO[7:4] are powered from VDD_PADS. AIO [2:0] are powered from VDD_USB.
PIO lines can be configured through software to have either weak or strong pull-ups or pull-downs. All PIO lines
are configured as inputs with weak pull-downs at reset.
PIO[0] and PIO[1] are normally dedicated to RXEN and TXEN respectively, but they are available for general
use.
Any of the PIO lines can be configured as interrupt request lines or as wake-up lines from sleep modes. PIO[6] or
PIO [2] can be configured as a request line for an external clock source. This is useful when the clock to
BlueCore4-ROM is provided from a system application specific integrated circuit (ASIC).
BlueCore4-ROM has three general purpose analogue interface pins, AIO[0], AIO[1] and AIO[2]. These are used
to access internal circuitry and control signals. One pin is allocated to decoupling for the on-chip band gap
reference voltage, the other three may be configured to provide additional functionality.
Auxiliary functions available vi Auxiliary functions a these pins include an 8-bit ADC and an 8-bit DAC. Typically
the ADC is used for battery voltage measurement. Signals selectable at these pins include the band gap
reference voltage and a variety of clock signals; 48, 24, 16, 8MHz and the XTAL clock frequency. When used
with analogue signals the voltage range is constrained by the analogue supply voltage (1.8V). When configured
to drive out digital level signals (clocks) generated from within the analogue part of the device, the output voltage
level is determined by VDD_MEM (1.8V).
10.8.1 PIO Defaults for BTv2.0 + EDR HCI Level Bluetooth Stack
CSR cannot guarantee that these terminal functions remain the same. Please refer to the software release note
for the implementation of these PIO lines, as they are firmware build specific.
BC41B143A-ds-001Pe
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