BC41B143A-DS-001PE Datasheet, PDF (17/102 Pages) List of Unclassifed Manufacturers – BlueCpre 4-ROM Single Chip Bluetooth v2.0 System with EDR

Electrical Characteristics
Input/Output Terminal Characteristics (Continued)
Crystal Oscillator
Crystal frequency⁽⁴⁾
Digital trim range⁽⁵⁾
Trim step size⁽⁵⁾
Transconductance
Negative resistance⁽⁶⁾
Min
Typ
Max
Unit
8.0
-
32.0
MHz
5.0
6.2
8.0
pF
-
0.1
-
pF
2.0
-
-
mS
870
1500
2400
Ω
External Clock
Input frequency⁽⁷⁾
Clock input level⁽⁸⁾
Allowable Jitter
XTAL_IN input impedance
XTAL_IN input capacitance
7.5
-
40.0
MHz
0.2
-
VDD_ANA V pk-pk
-
-
15
ps rms
-
-
-
kΩ
-
7
-
pF
Notes:
VDD_CORE, VDD_RADIO, VDD_LO and VDD_ANA are at 1.8V unless shown otherwise.
VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise.
The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT.
Current drawn into a pin is defined as positive; current supplied out of a pin is defined as negative.
(1) _{Internal USB pull-up disabled}
(2) _{Access of ADC is through VM function and therefore sample rate given is achieved as part of this}
function
(3) _{Specified for an output voltage between 0.2V and VDD_PIO -0.2V}
(4) _{Integer multiple of 250kHz}
(5) _{The difference between the internal capacitance at minimum and maximum settings of the internal}
digital trim
(6) _{XTAL frequency = 16MHz; XTAL C0 = 0.75pF; XTAL load capacitance = 8.5pF}
(7) _{Clock input can be any frequency between 8 and 40MHz in steps of 250kHz and also covers the}
CDMA/3G TCXO frequencies of 7.68, 14.44, 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz
(8) _{Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or}
above VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN
BC41B143A-ds-001Pe
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Production Information
© Cambridge Silicon Radio Limited 2005
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