BC41B143A-DS-001PE Datasheet, PDF (74/102 Pages) List of Unclassifed Manufacturers – BlueCpre 4-ROM Single Chip Bluetooth v2.0 System with EDR

Device Terminal Descriptions
10.7.2 Long Frame Sync
Long Frame Sync is the name given to a clocking format that controls the transfer of PCM data words or
samples. In Long Frame Sync, the rising edge of PCM_SYNC indicates the start of the PCM word. When
BlueCore4-ROM is configured as PCM Master, generating PCM_SYNC and PCM_CLK, then PCM_SYNC is 8-
bits long. When BlueCore4-ROM is configured as PCM Slave, PCM_SYNC may be from two consecutive falling
edges of PCM_CLK to half the PCM_SYNC rate, i.e. 62.5μs long.
PCM_SYNC
PCM_CLK
PCM_OUT
1
23
4
5
6
78
PCM_IN
Undefined
1
23
4
56
7
8 Undefined
Figure 10.21: Long Frame Sync (Shown with 8-bit Companded Sample)
BlueCore4-ROM samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge.
PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in the LSB position or on
the rising edge.
10.7.3 Short Frame Sync
In Short Frame Sync the falling edge of PCM_SYNC indicates the start of the PCM word. PCM_SYNC is always
one clock cycle long.
PCM_SYNC
PCM_CLK
PCM_OUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
PCM_IN Undefined 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Undefined
Figure 10.22: Short Frame Sync (Shown with 16-bit Sample)
As with Long Frame Sync, BlueCore4-ROM samples PCM_IN on the falling edge of PCM_CLK and transmits
PCM_OUT on the rising edge. PCM_OUT may be configured to be high impedance on the falling edge of
PCM_CLK in the LSB position or on the rising edge.
BC41B143A-ds-001Pe
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Production Information
© Cambridge Silicon Radio Limited 2005
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