TC3299A Datasheet, PDF (8/26 Pages) List of Unclassifed Manufacturers – Ethernet PCMCIA Controller + COMBO Transceiver

TC3299A
Preliminary Data Sheet
PROM
Location
04h
05h
06-0Dh
0E,0Fh
10-15h
16-1Dh
1E-1Fh
Location Contents
ETHERNET ADDRESS 4
ETHERNET ADDRESS 5
RESERVED
57h
ETHERNET ADDRESS 0-5
RESERVED
42h
Details of PROM Map
EPCC Controller actually has a 64K address range but only does partial decoding on these devices.
The PROM data is mirrored at all decodes up to 40000H and the entire map is repeated at 80000H. To
access either the PROM or the RAM the user must initiate a Remote DMA transfer between the I/O port
and memory.
Remote Read/Write Cache:
The EPCC Controller includes 4 words cache internally. On a remote read the EPCC Controller moves
data from external memory buffer to the internal cache buffer; the EPCC moves data continuously until
the cache buffer is full. On a remote write the system can writes data into the cache buffer until the 4
words cache buffer is full.
PCMCIA CIS Structures & Decode Function:
The TC3299A supports access to 1K of attribute memory. Attribute memory is defined by the PCMCIA
standard to be comprised of the card's information structure and four 8-bits Card Configuration Registers.
These four registers are contained in the TC3299A. The attribute Memory (only even address can be
accessed) map for a PCMCIA card is shown below.
7
0
(Reserved)
(Reserved)
CCR1
(TC3299A)
CCR0
(TC3299A)
Reserved
Card's information structure
3FEH
3FCH
3FAH
3F8H
3F0H-3F6H
2EEH
02
00
Card Configuration Registers 0(R/W) (CCR0)
7
6
5
4
3
2
RESET XX IOEN XX
XX
XX
RESET : When this bit is set 1, a software reset to TC3299A.
IOEN : When this bit is set 1, the I/O operation is enabled.
1
0
PJ1 PJ0
Confidential.
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Copyright © 2003, IC Plus Corp.
August 27, 20003
TC3299A-DS-R30