SBN0064G Datasheet, PDF (8/37 Pages) List of Unclassifed Manufacturers – Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory

Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
3.4 Signal description
Table 3 Pad signal description
To avoid a latch-up effect at power-on: V_SS − 0.5 V < voltage at any pin at any time < V_DD + 0.5 V .
Pad
number
SYMBOL
I/O
Column/Segment Mapping.
DESCRIPTION
This signal controls the mapping relation between the column output of the Display
Data Memory and the SBN0064G’s segment output.
1
CSM
If CMS=1, the mapping is called Normal Mapping. The mapping relation is that
I
Columns 0, 1, 2,...,62,63 of the Display Data Memory are mapped to Segments 0,
1, 2,..., 62, 63 of segment driver outputs.
If CMS=0, the mapping is called Inverted Mapping. The mapping relation is that
Columns 0, 1, 2,...,62,63 of the Display Data Memory are mapped to Segments 63,
62, 61,..., 2, 1, 0 of segment driver outputs.
AC frame input.
2
M
Input
The AC frame signal is the AC signal for generating alternating bias voltage of
reverse polarities for LCD cells.
3
V_DD
Input
This signal is supplied by the SBN6400G.
Power supply for logic part of the chip.
The V_DD should be in the range from 2.7 volts to 5.5 volts.
External LCD Bias voltage.
4, 5, 6, 7
V3R, V2R,
V5R, V0R
Input
Note that V0R, V2R, V3R, and V5R must be connected to external bias voltages
V_DD, V2, V3, and V5, respectively, and the condition V_DD≥V1≥V2≥V3≥V4≥V5 must
always be met.
8
V_EE2
Input
In addition, V_LCD (V_DD - V5) should not exceed 13 volts.
Negative power supply for LCD bias.
This pad should be connected to the V_EE of the external bias circuit.
SEGNENT driver outputs.
The output voltage level of SEGMENT outputs are decided by the combination of
the alternating frame signal (M) and display data. Depending on the value of the AC
frame signal and the display data, a single voltage level is selected from V0, V2,
V3, or V5 for SEGMENT driver, as shown in Fig. 4.
9~72
SEG63~0
M
0
1
Output
0
1
0
Display
0
1
Data bit
V2 V5
SEG output
0
1
0
1
V3 V0 V2 V5
0
1
V3 V0
Fig.4 SEGMENT driver output voltage level
73
V_EE1
2005 May 20
Input
Negative power supply for LCD bias.
This pad should be connected to the V_EE of the external bias circuit.
8 of 37
data sheet (v3)