SBN0064G Datasheet, PDF (13/37 Pages) List of Unclassifed Manufacturers – Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory

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SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
6 DISPLAY DATA MEMORY AND LCD DISPLAY
The Display Data Memory is a static memory bit(cell) array of 64-row x 64-column. So, the total bit number is
64 x 64 = 4096 bits (512 bytes). Each bit of the memory is mapped to a single pixel (dot) on the LCD panel. A “1” stored
in the Display Data Memory bit corresponds to an ON pixel (black dot in normal display). A “0” stored in the Display Data
Memory bit corresponds to an OFF pixel (background dot in normal display).
Column outputs (Column 0~63) of the Display Data Memory is mapped to SEG 0~63 outputs of the SBN0064G. The
mapping can be Normal Mapping or Inverse Mapping. Normal Mapping means that Column 0 is mapped to SEG0,
Column 1 to SEG1, Column 2 to SEG2, and so on. Inverse Mapping means that Column 0 is mapped to SEG 63, Column
1 to SEG 62, Column 2 to SEG 61, and so on. The mapping relation is decided by the CSM input (Column/Segment
Mapping). CSM=1 selects Normal Mapping and CSM=0 selects Inverse Mapping.
Any row (64 bits) of the Display Data Memory can be selected to map to the first row (COM0) of the LCD panel. This is
decided by the Display Start Line Register. The Display Start Line Register points at a row of the Display Data Memory,
which will be mapped to COM0 of LCD Display.
Mapping between Column and SEG
is decided by the CSM input
Row 0
Row 1
Row 2
Row 3
Row 0
Row 1
Row 2
Row 3
COM 0
COM 1
COM 2
COM 3
Row 60
Row 61
Row 62
Row 63
Row 60
Row 61
Row 62
Row 63
Display Data Memory Cell Array
COM 63
LCD panel pixel array
Mapping between Row and COM
is decided by the Display Start Line
Register
Fig.8 Memory cell array and LCD pixel array
2005 May 20
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data sheet (v3)