SBN0064G Datasheet, PDF (21/37 Pages) List of Unclassifed Manufacturers – Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory

Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
8.2 Read Display Data
The Read Display Data operation is a 3-step operation.
1. First, the current data of the internal 8-bit output latch of the Display Data Memory is read by the microcontroller, via
the 8-bit data bus DB0~DB7.
2. Then, a byte of data of the Display Data Memory is transferred to the 8-bit output latch from a location specified by
the Page Address Register and the Column Address Register,
3. Finally, the content of the Column Address Register is automatically incremented by one.
Fig. 12 shows the internal 8-bit output latch located between the 8-bit I/O data bus and the Display Data Memory cell
array. Because of this internal 8-bit output latch, a dummy read is needed to obtain correct data.
For Display Data Write operation, a dummy write is not needed, because data can be directly written from the data bus
to internal memory cells.
(8-bit bi-directional data bus)
Read Display Data _{8-bit output latch}
Write Display Data
Display Data Memory cell array
( 64 row x 64 column )
Column Address Decoder
Table 19 gives the control bus setting for this command.
Table 19 The setting of the control bus for Read Display Data command
C/D
R/W
1
1
Fig.12 Read Display Data Memory
2005 May 20
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data sheet (v3)