SBN0064G Datasheet, PDF (18/37 Pages) List of Unclassifed Manufacturers – Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory

Avant Electronics
SBN0064G
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
7.6 Column address and the Column Address Register
The Column Address Register points at a column of the Display Data Memory which the host microcontroller intends to
perform a READ/WRITE operation. To read or write a byte of the Display Data Memory, both its Page Address and
Column Address must be specified.
The Column Address Register automatically increments by 1 after a READ or WRITE operation is finished. When the
Column Address Register reaches 63, it overflows to 0. Please refer to Fig.11 for the column address sequence in a page
of the Display Data Memory.
To program this register, the setting of the control bus is given in Table 12 and the setting of the data bus is given in Table
13.
Table 12 The setting of the control bus for programming the Column Address Register
C/D
R/W
0
0
Table 13 The setting of the data bus for programming the Column Address Register
D7(MSB)
D6
D5
D4
D3
D2
D1
D0(LSB)
0
1
A5
A4
A3
A2
A1
A0
A5~A0 are column address bits and can be programmed with a value in the range from 0 to 63. Therefore, the code can
be from 0100 0000 (40 Hex) to 0111 1111 (7F Hex).
2005 May 20
18 of 37
data sheet (v3)