W65C21S Datasheet, PDF (6/16 Pages) List of Unclassifed Manufacturers – Peripheral Interface Adapter (PIA)

The Western Design Center, Inc.
AC TIMING CHARACTERISTICS
W65C21S Data Sheet
Parameter
PHI2 Cycle
PHI2 Pulse Width
PHI2 Rise and Fall Time
READ TIMING
Parameter
Address Set-Up Time
Address Hold Time
Peripheral Data Setup Time
Data Bus Delay Time
Data Bus Hold Time
14 MHz @ 5V
Symbol Min Max Unit
t_CYC
70
t_C
35
t_rc t_fc
-
-
ns
-
ns
5
ns
14 MHz @ 5V
Symbol Min Max Unit
t_ACR
10
-
ns
t_CAR
0
-
ns
t_PCR
10
-
ns
t_CDR
-
20 ns
t _HR
5
-
ns
WRITE TIMING
Parameter
Address Set-Up Time
Address Hold Time
Data Bus Set-Up Time
Data Bus Hold Time
Peripheral Data Delay Time
14 MHz @ 5V
Symbol Min Max Unit
t_ACW
10
-
ns
t_CAW
0
-
ns
t_DCW
10
-
ns
t_HW
5
-
ns
t_CPW
-
20 ns
PERIPHERAL INTERFACE TIMING
Parameter
14 MHz @ 5V
Symbol Min Max Unit
PHI2 Low to CA2 Low Delay
t_CA2
-
20
ns
PHI2 Low to CA2 High Delay
CA1 Active to CA2 High Delay
PHI2 High to CB2 Low Delay
Peripheral Data Valid to CB2 Low
Delay
t_RS1
-
20
ns
t_RS2
-
25
ns
t_CB2
-
70
ns
t_DC
5
-
ns
PHI2 High to CB2 High Delay
CB1 Active to CB2 High Delay
CA1, CA1, CB1, and CB2
Input Rise and Fall Time
t_RS1
-
20
ns
t_RS2
-
25
ns
t_r, t_f
-
10
ns
Interrupt Input Pulse Width
Interrupt Response Time
Interrupt Clear Delay
PWI
-
70
ns
tRS3
-
20
ns
tIR
-
25
ns
The Western Design Center
W65C21S
6