OV6620 Datasheet, PDF (6/31 Pages) List of Unclassifed Manufacturers – SINGLE-CHIP CMOS CIF COLOR DIGITAL CAMERA

OMNIVISION TECHNOLOGIES, Inc.
OV6620/OV6120
Advanced Information
Preliminary
SINGLE IC CMOS COLOR AND B/W DIGITAL CAMERAS
VSYNC
Even Field 1(FODD=0)
Odd Field(FODD=1)
t8 t8
HREF
PCLK
Y[7:0] /
UV[7:0]
t6
t5
t7
t2
t1
t4
t3
12
Valid Data
Horizontal Timing
351 352
VSYNC
T_vs
1 Line
T_ve
Y[7:0]/
UV[7:0]
T_line
Figure 2. Zoom Video Port Timing
Notes:
1. Zoom Video Port format output signal includes:
VSYNC: Vertical sync pulse.
HREF: Horizontal valid data output window.
PCLK: Pixel clock used to clock valid data and CHSYNC into Zoom V Port. Default frequency is 8.86MHz when use
17.73MHz as system clock. Rising edge of PCLK is used to clock the 16 Bit data.
Y[7:0]: 8 Bit luminance data bus.
UV[7:0]: 8 Bit chrominance data bus.
2. All timing parameters are provided in Table 13. Zoom Video Port AC Parameters
6
Version 1.11
14 May 1999