56F8357 Datasheet, PDF (41/172 Pages) List of Unclassifed Manufacturers – 16-BIT HYBRID CONTROLLERS

Note: Data Flash and Program RAM are NOT available on the 56F8157 device.
Program Map
On-Chip Memory
Program Flash
Data Flash
Program RAM
Data RAM
Program Boot Flash
Table 4-1 Chip Memory Configurations
56F8357
56F8157
Use Restrictions
256KB
8KB
4KB
16KB
16KB
256KB
—
—
16KB
16KB
Erase / Program via Flash interface unit and word writes to CDBW
Erase / Program via Flash interface unit and word writes to CDBW.
Data Flash can be read via one of CDBR or XDB2, but not both
simultaneously
None
None
Erase / Program via Flash Interface unit and word to CDWB
4.2 Program Map
The operating mode control bits (MA and MB) in the Operating Mode Register (OMR) control the
Program memory map. At reset, these bits are set as indicated in Table 4-2. Table 4-4 shows the memory
map configurations that are possible at reset. After reset, the OMR MA bit can be changed and will have
an effect on the P-space memory map, as shown in Table 4-3. Changing the OMR MB bit will have no
effect
Table 4-2 OMR MB/MA Value at Reset
OMR MB =
Flash Secured
State^{1, 2}
OMR MA =
EXTBOOT Pin
Chip Operating Mode
0
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
0
1
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
1
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
1
1
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
1. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
2. Changing MB in software will not affect Flash memory security.
Table 4-3 Changing OMR MA Value During Normal Operation
OMR MA
0
1
Chip Operating Mode
Use internal P-space memory map configuration
Use external P-space memory map configuration – If MB = 0 at reset, changing this bit has no
effect.
56F8357 Technical Data, Rev. 8.0
Freescale Semiconductor
41
Preliminary