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56F8357 Datasheet, PDF (34/172 Pages) List of Unclassifed Manufacturers – 16-BIT HYBRID CONTROLLERS
Table 2-2 Signal and Package Information for the 160-Pin LQFP
Signal Name Pin No. Type
State
During
Reset
Signal Description
ISB0
61
Schmitt
Input
Input
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
(GPIOD10)
ISB1
(GPIOD11)
ISB2
(GPIOD12)
FAULTB0
FAULTB1
FAULTB2
FAULTB3
ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7
VREFH
VREFP
VREFMID
VREFN
VREFLO
Schmitt
Input/
63
Output
64
67
Schmitt
Input
68
69
72
100
Input
101
102
103
104
Input
105
106
107
113
Input
112
Input/
Output
111
110
109
Input
Input
Input
Input
Port D GPIO — These GPIO pins can be individually programmed
as input or output pins.
At reset, these pins default to ISB functionality.
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOD_PUR register. For details, see Part 6.5.8.
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMB bit in the
SIM_PUDR register. For details, see Part 6.5.8.
ANA0 - 3 — Analog inputs to ADC A, channel 0
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
Input
Input/
Output
VREFH — Analog Reference Voltage High. VREFH must be less
than or equal to VDDA_ADC.
VREFP, VREFMID & VREFN — Internal pins for voltage reference
which are brought off-chip so they can be bypassed. Connect to a
0.1µF low ESR capacitor.
Input
VREFLO — Analog Reference Voltage Low. This should normally
be connected to a low-noise VSS.
56F8357 Technical Data, Rev. 8.0
34
Freescale Semiconductor
Preliminary