SIS5595 Datasheet, PDF (32/216 Pages) List of Unclassifed Manufacturers – Pentium PCI System I/O Chipset

SiS5595 PCI System I/O Chipset
generates an interrupt when the last bit of the timer changes (from 0 to 1 or 1 to 0). The PM
Timer can be accessed directly by the ACPI driver or software. The TMR_STS status bit is
set any time the last bit of the timer bit 23 goes from HIGH to LOW or LOW to HIGH. If the
TMR_EN bit is set, the TMR_STS being set will generate an ACPI event (SCI/SMI#). The
timer is reset when system wake-up from sleeping states (S1, S2) or hardware reset.
• Real Time Clock Alarm
It is required to extend the current RTC definition of a 24-hour alarm to a one-month-alarm in
ACPI specification. To extend the alarm bytes, SiS5595 supports both the Day of the Month
Alarm, and Month Alarm function. The Day of the Month Alarm byte, and Month Alarm byte
are located in the 7Eh, and 7Fh of the Standard Bank of the RTC CMOS RAM, respectively.
The RTC_STS bit will be set once IRQ8# is asserted from the internal RTC module. The
application software can set any specific time to generate an SCI or SMI# if the system is in
the working state, or a wake-up event if the system is in the sleeping state S1, or S2.
• SCI /SMI# Generation
When SCI_EN=1, most of the ACPI events can generate SCI; when SCI_EN=0 (Legacy
mode) they can generate SMI#. Normally, ACPI events can generate SCI or SMI# only when
the system is in the G0 working state. However, an option is reserved to generate SMI# in
response to the ACPI events while the system is in one of the sleeping states. Figure 3.2-9
SCI / SMI# Events Overview summarizes all the supported ACPI events in SiS5595 to
generate SCI/SMI#. System designer should take care that some events only generate SMI#
or wake up system. For example, Hotkey can only generate SCI/SMI#, IRQWK can only
generate wake-up events in S1 or S2 state, and SIRQ can only generate SMI#.
Preliminary V2.0 Nov. 2, 1998
26 Silicon Integrated Systems Corporation