SIS5595 Datasheet, PDF (165/216 Pages) List of Unclassifed Manufacturers – Pentium PCI System I/O Chipset

SiS5595 PCI System I/O Chipset
BIT
ACCESS
DESCRIPTION
7:0
R/W SMBus Device Address(SMB_Device)
This field is used to save the Device Address when Host
received a modified Write Word from other SMBus trasmitter and
the Slave Address field hit the Host Reserved Address or Host
Alias Address.
Register 11h SMBus Device Byte 0(SMB_DB0)
Default Value: 00h
Access: Read/Write
BIT
ACCESS
DESCRIPTION
7:0
R/W SMBus Device Byte 0(SMB_Byte0)
This register contains the Data Low Byte when Host receive a
modified Write Word from other SMBus master.
Register 12h SMBus Device Byte 1(SMB_DB1)
Default Value: 00h
Access: Read/Write
BIT
ACCESS
DESCRIPTION
7:0
R/W SMBus Device Byte 1(SMB_Byte1)
This register contains the Data High Byte when Host receives a
modified Write Word from other SMBus master.
Register 13h SMBus Host Alias Address(SMB_HAA)
Default Value: 00h
Access: Read/Write
BIT
ACCESS
DESCRIPTION
7:1
R/W SMBus Host Alias Address(SMB_Alias)
When Host receives a modified Write Word and the Slave
Address field is equivalent to the content of this register, an
interrupt will be raised if Alias Interrupt is also enabled.
0
RO Read as ‘0’. The Host Slave accepts master Write Word protocol
only.
Register FFh
Default Value:
Access:
Set Specific Status bit in GPE_STS and PM1_STS
00h
Write Only
Preliminary V2.0 Nov. 2, 1998
159 Silicon Integrated Systems Corporation