SD1010 Datasheet, PDF (29/46 Pages) List of Unclassifed Manufacturers – Dual-Interface XGA TFT LCD Display Controller

SmartASIC, Inc.
SD1010
it results in normal calibration time
(recommended)
3: when input video signal has no overshot,
it results in shortest calibration time
PWM unit delay
16 25AH-25BH The unit delay used in the external PWM delay circuitry.
If the free-running clock is 1MHz, and the intended unit
delay is 0.2 ns (= 5,000MHz), then a value of
5,000MHz/1MHz = 5,000 is used here.
Maximum link off time 22 25CH-25EH Maximum time when input VSYNC is off before the
LINK_DWN pin turns ON (unit: clock period of the free
running clock). If the free-running clock is 1MHz, and the
intended maximum time is 1 second, then a value of
1,000,000 µs/ 1 µs = 1,000,000 is used here.
Maximum refresh rate
16 25FH-260H Maximum refresh rate supported by the LCD panel.
If the intended maximum refresh rate is 75Hz, and the
free-running clock is 1MHz, then a value of
1000000/75=133,333 is used here
Maximum input
8
261H Maximum source clock rate supported by the SD1010
frequency
(unit: frequency of free-running clock).
If the intended maximum clock rate is 60MHz, and the
free-running clock is 1MHz, then a value of 60 is used
here.
If the input signal has a higher frequency than this value,
the VCLK0_X status bit will turn ON.
Minimum pixels per line 11 262H-263H Minimum number of pixels per line for LCD panel
for LCD
LCD polarity
4 264H[3:0] _{Controls the polarity of output VSYNC,}
HSYNC, clock and display enable:Bit0: 0: clock
active high, 1: clock active low
Bit1: 0: HSYNC active low, 1: HSYNC active high
Bit2: 0: VSYNC active low, 1: VSYNC active high
Bit4: 0: de active high, 1: de active low
Output enable for output 1
265H[3] Enable for programmable output pad:
pin 51-54, 56-59, 61-64,
1: output is enabled
66-69, 71-74, 76-79, 81-
0: output is tri-state
84, 86-89, 91-97, 99,
101-104, 106-109
Driving
capability 3
265H[2:0] 0: 2mA
control for output pin
1: 6mA
51-54, 56-59, 61-64, 66-
2: 6mA
69, 71-74, 76-79, 81-84,
3: 10mA
86-89, 91-97, 99, 101-
4: 4mA
104, 106-109
5: 8mA
6: 8mA
7: 12mA
Output enable for output 1
266H[7] Enable for programmable output pad:
pin 49 (DE)
1: output is enabled
0: output is tri-state
Driving
capability 3
266H[6:4] 0: 2mA
control for output pin 49
1: 6mA
(DE)
2: 6mA
3: 10mA
4: 4mA
5: 8mA
November, 1999
SmartASIC Confidential
29
Revision B